llvm-6502/include/llvm/CodeGen
Chris Lattner beac75da37 implement rdar://6653118 - fastisel should fold loads where possible.
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:

int foo(int x, int y, int z) {
  return x+y+z;
}

used to compile into:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	movl	4(%rsp), %esi
	addl	%edx, %esi
	movl	(%rsp), %edx
	addl	%esi, %edx
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Now we produce:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	addl	4(%rsp), %edx    ## Folded load
	addl	(%rsp), %edx     ## Folded load
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Fewer instructions and less register use = faster compiles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 02:18:34 +00:00
..
Analysis.h Move several SelectionDAG-independent utility functions out of the 2010-04-21 01:22:34 +00:00
AsmPrinter.h Fix .debug_range for linux. Patch by Krister Wombell. 2010-09-02 16:43:44 +00:00
BinaryObject.h
CalcSpillWeights.h Implement register class inflation. 2010-08-10 18:37:40 +00:00
CallingConvLower.h Fix eabi calling convention when a 64 bit value shadows r3. 2010-08-06 15:35:32 +00:00
FastISel.h implement rdar://6653118 - fastisel should fold loads where possible. 2010-09-05 02:18:34 +00:00
FunctionLoweringInfo.h Reapply r112623. Included additional check for unused byval argument. 2010-08-31 22:22:42 +00:00
GCMetadata.h Trailing whitespace. 2010-07-01 01:00:22 +00:00
GCMetadataPrinter.h Trailing whitespace. 2010-07-01 01:00:22 +00:00
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h This is the first step towards refactoring the x86 vector shuffle code. The 2010-08-20 22:55:05 +00:00
JITCodeEmitter.h Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the 2010-04-18 00:51:49 +00:00
LatencyPriorityQueue.h Eliminate the use of PriorityQueue and just use a std::vector, 2010-05-26 18:52:00 +00:00
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h Remove the local register allocator. 2010-06-15 21:58:33 +00:00
LiveInterval.h Remove dead code. 2010-09-04 21:09:33 +00:00
LiveIntervalAnalysis.h Remove trailing whitespace. 2010-08-12 20:01:23 +00:00
LiveStackAnalysis.h Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
LiveVariables.h Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
MachineBasicBlock.h Add a getFirstNonPHI utility function. 2010-07-07 14:33:51 +00:00
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h Add const qualifiers to CodeGen's use of LLVM IR constructs. 2010-04-15 01:51:59 +00:00
MachineDominators.h Add an isReachableFromEntry to MachineDominators, following the one 2010-04-05 19:16:38 +00:00
MachineFrameInfo.h Add 'const' to getter function. 2010-09-03 18:17:16 +00:00
MachineFunction.h Remove double-def checking from MachineVerifier, so a register does not have to 2010-08-05 18:59:59 +00:00
MachineFunctionAnalysis.h Give MachineModuleInfo an actual Module*. 2010-04-06 00:51:52 +00:00
MachineFunctionPass.h Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
MachineInstr.h Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and 2010-07-16 22:20:36 +00:00
MachineInstrBuilder.h Add const qualifiers to CodeGen's use of LLVM IR constructs. 2010-04-15 01:51:59 +00:00
MachineJumpTableInfo.h Add explicit keywords. 2010-06-18 19:04:37 +00:00
MachineLocation.h
MachineLoopInfo.h Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
MachineMemOperand.h
MachineModuleInfo.h Revert r108369, sorting llvm.dbg.declare information by source position, 2010-07-16 17:54:27 +00:00
MachineModuleInfoImpls.h
MachineOperand.h Add a TargetRegisterInfo::composeSubRegIndices hook with a default 2010-05-28 18:18:53 +00:00
MachinePassRegistry.h
MachineRegisterInfo.h Begin implementation of an inline spiller. 2010-06-29 23:58:39 +00:00
MachineRelocation.h
MachineSSAUpdater.h Combine the implementations of the core part of the SSAUpdater and 2010-05-04 23:18:19 +00:00
MachORelocation.h
ObjectCodeEmitter.h
Passes.h Stop using the dom frontier in DwarfEHPrepare by not promoting alloca's 2010-08-31 09:05:06 +00:00
PostRAHazardRecognizer.h Add missing include to unbreak the build. 2010-06-14 22:44:26 +00:00
ProcessImplicitDefs.h Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h Be more forgiving when calculating alias interference for physreg coalescing. 2010-07-06 20:31:51 +00:00
RegisterScavenging.h After r107880, findSurvivorReg() no longer needs to be public. 2010-07-08 17:27:23 +00:00
RuntimeLibcalls.h back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set) 2010-06-18 23:03:10 +00:00
ScheduleDAG.h Change push_all to a non-virtual function and implement it in the 2010-05-26 01:10:55 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h Add an ILP scheduler. This is a register pressure aware scheduler that's 2010-07-24 00:39:05 +00:00
SelectionDAG.h zap unused method. x86 is the only user and already has a more powerfull version 2010-08-31 02:36:20 +00:00
SelectionDAGISel.h implement rdar://6653118 - fastisel should fold loads where possible. 2010-09-05 02:18:34 +00:00
SelectionDAGNodes.h Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and 2010-07-07 15:28:42 +00:00
SlotIndexes.h Fix a FIXME. The SlotIndex::Slot enum should be private. 2010-08-11 16:50:17 +00:00
TargetLoweringObjectFileImpl.h nuke dead ivar which was supposed to be committed with r112496 2010-08-30 18:16:27 +00:00
ValueTypes.h zap the now unused MVT::getIntVectorWithNumElements 2010-08-26 20:53:12 +00:00
ValueTypes.td Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 2010-05-13 23:55:47 +00:00