Quentin Colombet ce734f1f43 [PR16882] Ignore noreturn definitions when setting isPhysRegUsed. ... PEI inserts a save/restore sequence for the link register, according to the information it gets from the MachineRegisterInfo. MachineRegisterInfo is populated by the VirtRegMap pass. This pass was not aware of noreturn calls and was registering the definitions of these calls the same way as regular operations. Modify VirtRegPass so that it does not set the isPhysRegUsed information for registers only defined by noreturn calls. The rational is that a noreturn call is the "last instruction" of the program (if it returns the behavior is undefined), so everything that is defined by it cannot be used and will not interfere with anything else. Therefore, it is pointless to account for then. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191349 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-25 00:26:17 +00:00
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AArch64	llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.	2013-09-24 04:14:29 +00:00
ARM	[PR16882] Ignore noreturn definitions when setting isPhysRegUsed.	2013-09-25 00:26:17 +00:00
CPP	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Generic	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Hexagon	Debug Info Testing: use null instead of an empty string in context field.	2013-09-09 00:12:17 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	[mips][msa] Added support for matching pckev, and pckod from normal IR (i.e. not intrinsics)	2013-09-24 14:53:25 +00:00
MSP430	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
NVPTX	[NVPTX] Make constant vector test case endian-independent	2013-09-19 13:14:44 +00:00
PowerPC	[PowerPC] Fix problems with large code model (PR17169).	2013-09-17 20:03:25 +00:00
R600	R600: Move code handling literal folding into R600ISelLowering.	2013-09-12 23:44:53 +00:00
SPARC	[Sparc] Add support for TLS in sparc.	2013-09-22 06:48:52 +00:00
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.	2013-09-09 14:21:49 +00:00
X86	Add missing check to SETCC optimization.	2013-09-24 22:50:14 +00:00
XCore	XCore handling of thread local lowering	2013-09-09 10:42:11 +00:00