llvm-6502/lib/Target/MSP430
Chris Lattner cee63322ea Eliminate SetDirective, and replace it with HasSetDirective.
Default HasSetDirective to true, since most targets have it.

The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16.  All of these except pic16 are normal ELF targets, so
they almost certainly have it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 20:40:54 +00:00
..
AsmPrinter add a new MachineBasicBlock::getSymbol method, replacing 2010-01-26 04:55:51 +00:00
TargetInfo make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
CMakeLists.txt Update CMake build. 2010-01-15 22:59:11 +00:00
Makefile make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
MSP430.h Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430.td Provide instruction sizes & encoding. No opcodes yet (but not needed so far). 2010-01-15 21:18:39 +00:00
MSP430BranchSelector.cpp Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430CallingConv.td
MSP430InstrFormats.td Provide instruction sizes & encoding. No opcodes yet (but not needed so far). 2010-01-15 21:18:39 +00:00
MSP430InstrInfo.cpp Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430InstrInfo.h Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430InstrInfo.td Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430ISelDAGToDAG.cpp Change SelectCode's argument from SDValue to SDNode *, to make it more 2010-01-05 01:24:18 +00:00
MSP430ISelLowering.cpp zext / truncate is free on msp430. Inform codegen about this. 2010-01-15 21:19:43 +00:00
MSP430ISelLowering.h zext / truncate is free on msp430. Inform codegen about this. 2010-01-15 21:19:43 +00:00
MSP430MachineFunctionInfo.h
MSP430MCAsmInfo.cpp Eliminate SetDirective, and replace it with HasSetDirective. 2010-01-26 20:40:54 +00:00
MSP430MCAsmInfo.h
MSP430RegisterInfo.cpp
MSP430RegisterInfo.h
MSP430RegisterInfo.td
MSP430Subtarget.cpp
MSP430Subtarget.h
MSP430TargetMachine.cpp Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
MSP430TargetMachine.h Add branch relaxation pass (shamelessly stolen from PPC). 2010-01-15 21:19:05 +00:00
README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.