Adhemerval Zanella cfe09ed28d [PATCH] PowerPC: Expand load extend vector operations ... This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for vector types when altivec is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167386 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-05 17:15:56 +00:00
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ARM	Vext Lowering was missing opportunities	2012-11-02 21:32:17 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	[mips] Set flag neverHasSideEffects flag on floating point conversion	2012-11-03 00:53:12 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX	Add llvm.fabs intrinsic.	2012-05-28 21:48:37 +00:00
PowerPC	[PATCH] PowerPC: Expand load extend vector operations	2012-11-05 17:15:56 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	test/CodeGen/X86/fp-fast.ll: Add +avx.	2012-11-01 02:13:45 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00