Hao Liu 7d3a44a692 [AArch64]Fix PR21675, a bug about lowering llvm.ctpop.i32. We should noot use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector. ...

Patch by Wei-cheng Wang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227550 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-30 02:13:53 +00:00

..

AsmParser

AArch64: decode all MRS/MSR forms early to avoid saving FeatureBits.

2015-01-22 17:23:04 +00:00

Disassembler

unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizer

2015-01-18 20:45:48 +00:00

InstPrinter

[AArch64] Allow access to all system registers with MRS/MSR instructions.

2014-10-01 10:13:59 +00:00

MCTargetDesc

Fix a problem where the AArch64 ELF assembler was failing with

2015-01-26 06:32:17 +00:00

TargetInfo

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Utils

[AArch64] Allow access to all system registers with MRS/MSR instructions.

2014-10-01 10:13:59 +00:00

AArch64.h

[AArch64] Add workaround for Cortex-A53 erratum (835769)

2014-10-13 10:12:35 +00:00

AArch64.td

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AArch64A53Fix835769.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64A57FPLoadBalancing.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64AddressTypePromotion.cpp

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AArch64AdvSIMDScalarPass.cpp

This only needs TargetInstrInfo, not the specialized one.

2015-01-30 01:10:18 +00:00

AArch64AsmPrinter.cpp

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64BranchRelaxation.cpp

Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.

2015-01-28 03:51:33 +00:00

AArch64CallingConvention.h

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64CallingConvention.td

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64CleanupLocalDynamicTLSPass.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64CollectLOH.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64ConditionalCompares.cpp

The subtarget is cached on the MachineFunction. Access it directly.

2015-01-27 07:31:29 +00:00

AArch64ConditionOptimizer.cpp

Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.

2015-01-28 03:51:33 +00:00

AArch64DeadRegisterDefinitionsPass.cpp

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AArch64ExpandPseudoInsts.cpp

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AArch64FastISel.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64FrameLowering.cpp

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64FrameLowering.h

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AArch64InstrAtomics.td

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AArch64InstrFormats.td

Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.

2014-11-26 00:46:26 +00:00

AArch64InstrInfo.cpp

Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.

2015-01-28 03:51:33 +00:00

AArch64InstrInfo.h

[cleanup] Re-sort all the #include lines in LLVM using

2015-01-14 11:23:27 +00:00

AArch64InstrInfo.td

Revert r225165 and r225169

2015-01-07 06:34:34 +00:00

AArch64ISelDAGToDAG.cpp

Clean up some uses of getSubtarget in AArch64.

2015-01-30 01:10:24 +00:00

AArch64ISelLowering.cpp

[AArch64]Fix PR21675, a bug about lowering llvm.ctpop.i32. We should noot use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector.

2015-01-30 02:13:53 +00:00

AArch64ISelLowering.h

Remove getSubtargetImpl from AArch64ISelLowering and cache the

2015-01-29 00:19:42 +00:00

AArch64LoadStoreOptimizer.cpp

Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.

2015-01-28 03:51:33 +00:00

AArch64MachineCombinerPattern.h

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AArch64MachineFunctionInfo.h

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AArch64MCInstLower.cpp

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AArch64MCInstLower.h

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AArch64PBQPRegAlloc.cpp

Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.

2015-01-28 03:51:33 +00:00

AArch64PBQPRegAlloc.h

[AArch64] Cleanup A57PBQPConstraints

2014-10-22 12:40:20 +00:00

AArch64PerfectShuffle.h

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AArch64PromoteConstant.cpp

Make the DenseMap bucket type configurable and use a smaller bucket for DenseSet.

2014-12-06 19:22:44 +00:00

AArch64RegisterInfo.cpp

AArch64: add backend option to reserve x18 (platform register)

2015-01-21 15:43:31 +00:00

AArch64RegisterInfo.h

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AArch64RegisterInfo.td

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AArch64SchedA53.td

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AArch64SchedA57.td

[AArch64] Enable partial & runtime unrolling on cortex-a57.

2014-10-09 10:13:27 +00:00

AArch64SchedA57WriteRes.td

[AArch64] Refines the Cortex-A57 Machine Model

2014-09-29 21:27:36 +00:00

AArch64SchedCyclone.td

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AArch64Schedule.td

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AArch64SelectionDAGInfo.cpp

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AArch64SelectionDAGInfo.h

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AArch64StorePairSuppress.cpp

Clean up the AArch64 store pair suppression pass initialization

2015-01-27 07:54:36 +00:00

AArch64Subtarget.cpp

Remove getSubtargetImpl from AArch64ISelLowering and cache the

2015-01-29 00:19:42 +00:00

AArch64Subtarget.h

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64TargetMachine.cpp

Remove a few getSubtarget calls in AArch64 pass manager initialization.

2015-01-30 01:10:26 +00:00

AArch64TargetMachine.h

Move DataLayout back to the TargetMachine from TargetSubtargetInfo

2015-01-26 19:03:15 +00:00

AArch64TargetObjectFile.cpp

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AArch64TargetObjectFile.h

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AArch64TargetTransformInfo.cpp

Commoning of target specific load/store intrinsics in Early CSE.

2015-01-26 22:51:15 +00:00

CMakeLists.txt

[AArch64] Add workaround for Cortex-A53 erratum (835769)

2014-10-13 10:12:35 +00:00

LLVMBuild.txt

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Makefile

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