llvm-6502/test/CodeGen
Hal Finkel d138a7bb3f [PowerPC] Materialize i64 constants using bit inversion
Materializing full 64-bit constants on PPC64 can be expensive, requiring up to
5 instructions depending on the locations of the non-zero bits. Sometimes
materializing the bit-reversed constant, and then flipping the bits, requires
fewer instructions than the direct method. If so, do that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225132 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-04 12:35:03 +00:00
..
AArch64 Lower multiply-negate operation to mneg on AArch64 2014-12-22 13:38:58 +00:00
ARM ARM: permit tail calls to weak externals on COFF 2015-01-03 21:35:00 +00:00
CPP
Generic CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. 2014-12-19 20:50:07 +00:00
Hexagon [Hexagon] Adding reg-reg indexed load forms. 2014-12-30 18:58:47 +00:00
Inputs
Mips [mips][microMIPS] Fix bugs related to atomic SC/LL instructions 2014-12-18 16:39:29 +00:00
MSP430
NVPTX [NVPTX] Fix bugs related to isSingleValueType 2014-12-17 17:59:04 +00:00
PowerPC [PowerPC] Materialize i64 constants using bit inversion 2015-01-04 12:35:03 +00:00
R600 Enable (sext x) == C --> x == (trunc C) combine 2014-12-21 16:48:42 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 Revert "merge consecutive stores of extracted vector elements" 2014-12-31 00:40:28 +00:00
XCore