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llvm-6502/lib/Target/Hexagon
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Brendon Cahoon 1854722327 Fix the numbering of some of the registers and reclassify a couple of them. 
Also, some basic clean up.  Patch by Evandro Menezes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151266 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23 18:17:17 +00:00
..
MCTargetDesc Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
TargetInfo Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies(). 2011-12-13 00:36:04 +00:00
CMakeLists.txt Optimize redundant sign extends and negation of predicates. 2012-02-15 18:52:27 +00:00
Hexagon.h Optimize redundant sign extends and negation of predicates. 2012-02-15 18:52:27 +00:00
Hexagon.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonAsmPrinter.cpp Efficient pattern for store truncate. Patch by Evandro Menezes. 2012-02-22 16:45:10 +00:00
HexagonCallingConv.td
HexagonCallingConvLower.cpp
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonExpandPredSpillCode.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonFrameLowering.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp Optimize redundant sign extends and negation of predicates. 2012-02-15 18:52:27 +00:00
HexagonImmediates.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonInstrFormats.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonInstrFormatsV4.td
HexagonInstrInfo.cpp Efficient pattern for store truncate. Patch by Evandro Menezes. 2012-02-22 16:45:10 +00:00
HexagonInstrInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonInstrInfo.td Efficient pattern for store truncate. Patch by Evandro Menezes. 2012-02-22 16:45:10 +00:00
HexagonInstrInfoV3.td
HexagonInstrInfoV4.td Optimize redundant sign extends and negation of predicates. 2012-02-15 18:52:27 +00:00
HexagonIntrinsics.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonISelDAGToDAG.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonISelLowering.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonISelLowering.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonMachineFunctionInfo.h
HexagonPeephole.cpp Optimize redundant sign extends and negation of predicates. 2012-02-15 18:52:27 +00:00
HexagonRegisterInfo.cpp Efficient pattern for store truncate. Patch by Evandro Menezes. 2012-02-22 16:45:10 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td Fix the numbering of some of the registers and reclassify a couple of them. 2012-02-23 18:17:17 +00:00
HexagonRemoveSZExtArgs.cpp Hexagon: Remove forbidden iostream includes (it introduces static initializers) 2012-02-06 10:19:29 +00:00
HexagonSchedule.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonScheduleV4.td
HexagonSelectCCInfo.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSplitTFRCondSets.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSubtarget.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSubtarget.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonTargetMachine.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonTargetMachine.h TargetPassConfig: confine the MC configuration to TargetMachine. 2012-02-04 02:56:59 +00:00
HexagonTargetObjectFile.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonTargetObjectFile.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonVarargsCallingConvention.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
LLVMBuild.txt Add MCTargetDesc library to Hexagon target 2011-12-15 22:29:08 +00:00
Makefile VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 2012-02-01 22:13:57 +00:00