llvm-6502/test/MC/Disassembler
Vladimir Sukharev d1e387b9e6 [AArch64] LORID_EL1 register must be treated as read-only
Patch by: John Brawn

Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9105


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-20 16:54:37 +00:00
..
AArch64 [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
ARM [ARM] Add v8.1a "Privileged Access Never" extension 2015-04-16 11:34:25 +00:00
Hexagon [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 2015-02-03 19:15:11 +00:00
Mips [mips][microMIPSr6] Implement disassembler support 2015-04-20 14:40:38 +00:00
PowerPC Add direct moves to/from VSR and exploit them for FP/INT conversions 2015-04-11 10:40:42 +00:00
Sparc
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
X86 Fix the operand encoding in the test instruction. 2015-03-31 12:31:55 +00:00
XCore