David Goodwin 0dad89fa94 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8		2009-09-30 00:10:16 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoalescerBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2008-11-19-ScavengerAssert.ll	Improve MachineMemOperand handling.	2009-09-25 20:36:54 +00:00
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-12-RegScavengerAssert.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
2009-08-21-PostRAKill3.ll	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
2009-08-21-PostRAKill4.ll	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
2009-08-21-PostRAKill.ll	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll
2009-08-31-TwoRegShuffle.ll
2009-09-01-PostRAProlog.ll	Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.	2009-09-30 00:10:16 +00:00
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll	Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register.	2009-09-22 08:34:46 +00:00
2009-09-22-LiveVariablesBug.ll	Fix PR5024. LiveVariables physical register defs should *commit* only after all	2009-09-23 06:28:31 +00:00
2009-09-23-LiveVariablesBug.ll	Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.	2009-09-24 02:27:09 +00:00
2009-09-24-spill-align.ll	pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.	2009-09-25 14:41:49 +00:00
2009-09-27-CoalescerBug.ll	Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of	2009-09-28 05:28:43 +00:00
2009-09-28-LdStOptiBug.ll	Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.	2009-09-29 07:07:30 +00:00
addrmode.ll
aliases.ll
align.ll
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm-asm.ll
arm-frameaddr.ll
arm-negative-stride.ll
bfc.ll
bic.ll
bits.ll
bx_fold.ll
call_nolink.ll
call.ll
carry.ll
clz.ll
compare-call.ll
constants.ll
cse-libcalls.ll
ctors_dtors.ll
dg.exp
div.ll
dyn-stackalloc.ll
extloadi1.ll
fabss.ll
fadds.ll
fcopysign.ll
fdivs.ll
fixunsdfdi.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnegs.ll
fnmacs.ll
fnmscs.ll
fnmul.ll
fnmuls.ll
formal.ll
fp_convert.ll
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp.ll
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll
fptoint.ll
fsubs.ll
hardfloat_neon.ll
hello.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
iabs.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
illegal-vector-bitcast.ll
imm.ll
inlineasm2.ll
inlineasm-imm-arm.ll
inlineasm.ll
insn-sched1.ll
ispositive.ll
large-stack.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll	Convert test to filecheck.	2009-09-26 02:41:17 +00:00
load-global.ll
load.ll
long_shift.ll
long-setcc.ll
long.ll
lsr-code-insertion.ll
lsr-scale-addr-mode.ll
mem.ll
memcpy-inline.ll
memfunc.ll
mls.ll
mul_const.ll
mul.ll
mulhi.ll
mvn.ll
neon_arith1.ll
neon_ld1.ll
neon_ld2.ll
pack.ll
pr3502.ll
private.ll
remat.ll	Clean up spill weight computation. Also some changes to give loop induction	2009-09-21 21:12:25 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll
section.ll
select_xform.ll
select.ll
shifter_operand.ll
smul.ll
spill-q.ll
stack-frame.ll
stm.ll
str_post.ll
str_pre-2.ll
str_pre.ll
str_trunc.ll
sxt_rot.ll
t2-imm.ll	Use movt/movw pair to materialize 32 bit constants on ARMv6T2+.	2009-09-27 23:52:58 +00:00
thread_pointer.ll
tls1.ll
tls2.ll
tls3.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
unaligned_load_store.ll
unord.ll
uxt_rot.ll
uxtb.ll
vaba.ll
vabal.ll
vabd.ll
vabdl.ll
vabs.ll
vacge.ll
vacgt.ll
vadd.ll
vaddhn.ll
vaddl.ll
vaddw.ll
vand.ll
vargs_align.ll	Convert to FileCheck.	2009-09-24 20:23:02 +00:00
vargs.ll
vbic.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
vcls.ll
vclz.ll
vcnt.ll
vcombine.ll
vcvt_n.ll
vcvt.ll
vdup_lane.ll
vdup.ll
veor.ll
vext.ll
vfcmp.ll
vfp.ll
vget_lane2.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vldlane.ll
vmax.ll
vmin.ll
vmla.ll
vmlal_lane.ll
vmlal.ll
vmls.ll
vmlsl_lane.ll
vmlsl.ll
vmov.ll
vmovl.ll
vmovn.ll
vmul_lane.ll
vmul.ll
vmull_lane.ll
vmull.ll
vmvn.ll
vneg.ll
vorn.ll
vorr.ll
vpadal.ll
vpadd.ll
vpaddl.ll
vpmax.ll
vpmin.ll
vqabs.ll
vqadd.ll
vqdmlal_lanes.ll
vqdmlal.ll
vqdmlsl_lanes.ll
vqdmlsl.ll
vqdmulh_lane.ll
vqdmulh.ll
vqdmull_lane.ll
vqdmull.ll
vqmovn.ll
vqneg.ll
vqRdmulh_lane.ll
vqrshl.ll
vqrshrn.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vraddhn.ll
vrecpe.ll
vrecps.ll
vrev.ll
vrhadd.ll
vrshl.ll
vrshrn.ll
vrsqrte.ll
vrsqrts.ll
vrsubhn.ll
vset_lane.ll
vshift_split.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll
vsub.ll
vsubhn.ll
vsubl.ll
vsubw.ll
vtbl.ll
vtrn.ll
vtst.ll
vuzp.ll
vzip.ll
weak2.ll
weak.ll