Evan Cheng d258eb3ec5 Fix a miscompilation caused by a typo. When turning a adde with negative value ... into a sbc with a positive number, the immediate should be complemented, not negated. Also added a missing pattern for ARM codegen. rdar://12559385 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166613 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-24 19:53:01 +00:00
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ARM	Fix a miscompilation caused by a typo. When turning a adde with negative value	2012-10-24 19:53:01 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	[mips] Make sure sret argument is returned in register V0.	2012-10-24 02:10:54 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX
PowerPC	This patch fixes failures in the SingleSource/Regression/C/uint64_to_float	2012-10-18 13:16:11 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Fix a miscompilation caused by a typo. When turning a adde with negative value	2012-10-24 19:53:01 +00:00
X86	Special calling conventions for Intel OpenCL built-in library.	2012-10-24 14:46:16 +00:00
XCore