llvm-6502/test/CodeGen/Thumb/long.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

83 lines
1.6 KiB
LLVM

; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-apple-darwin %s -o - | FileCheck %s -check-prefix CHECK-DARWIN
define i64 @f1() {
entry:
ret i64 0
}
define i64 @f2() {
entry:
ret i64 1
}
define i64 @f3() {
entry:
ret i64 2147483647
}
define i64 @f4() {
entry:
ret i64 2147483648
}
define i64 @f5() {
entry:
ret i64 9223372036854775807
}
define i64 @f6(i64 %x, i64 %y) {
entry:
%tmp1 = add i64 %y, 1 ; <i64> [#uses=1]
ret i64 %tmp1
}
define void @f7() {
entry:
%tmp = call i64 @f8( ) ; <i64> [#uses=0]
ret void
}
declare i64 @f8()
define i64 @f9(i64 %a, i64 %b) {
entry:
%tmp = sub i64 %a, %b ; <i64> [#uses=1]
ret i64 %tmp
}
define i64 @f(i32 %a, i32 %b) {
entry:
%tmp = sext i32 %a to i64 ; <i64> [#uses=1]
%tmp1 = sext i32 %b to i64 ; <i64> [#uses=1]
%tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
ret i64 %tmp2
}
define i64 @g(i32 %a, i32 %b) {
entry:
%tmp = zext i32 %a to i64 ; <i64> [#uses=1]
%tmp1 = zext i32 %b to i64 ; <i64> [#uses=1]
%tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
ret i64 %tmp2
}
define i64 @f10() {
entry:
%a = alloca i64, align 8 ; <i64*> [#uses=1]
%retval = load i64, i64* %a ; <i64> [#uses=1]
ret i64 %retval
}
; CHECK: mvn
; CHECK-NOT: mvn
; CHECK: adc
; CHECK-NOT: adc
; CHECK: sbc
; CHECK-NOT: sbc
; CHECK-DARWIN: __muldi3