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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.5 KiB
LLVM
37 lines
1.5 KiB
LLVM
; RUN: llc < %s | grep "movl %esp, %ebp"
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; PR4572
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; Don't coalesce with %esp if it would end up putting %esp in
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; the index position of an address, because that can't be
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; encoded on x86. It would actually be slightly better to
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; swap the address operands though, since there's no scale.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i386-pc-mingw32"
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%"struct.std::valarray<unsigned int>" = type { i32, i32* }
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define void @_ZSt17__gslice_to_indexjRKSt8valarrayIjES2_RS0_(i32 %__o, %"struct.std::valarray<unsigned int>"* nocapture %__l, %"struct.std::valarray<unsigned int>"* nocapture %__s, %"struct.std::valarray<unsigned int>"* nocapture %__i) nounwind {
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entry:
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%0 = alloca i32, i32 undef, align 4 ; <i32*> [#uses=1]
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br i1 undef, label %return, label %bb4
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bb4: ; preds = %bb7.backedge, %entry
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%indvar = phi i32 [ %indvar.next, %bb7.backedge ], [ 0, %entry ] ; <i32> [#uses=2]
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%scevgep24.sum = sub i32 undef, %indvar ; <i32> [#uses=2]
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%scevgep25 = getelementptr i32, i32* %0, i32 %scevgep24.sum ; <i32*> [#uses=1]
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%scevgep27 = getelementptr i32, i32* undef, i32 %scevgep24.sum ; <i32*> [#uses=1]
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%1 = load i32, i32* %scevgep27, align 4 ; <i32> [#uses=0]
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br i1 undef, label %bb7.backedge, label %bb5
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bb5: ; preds = %bb4
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store i32 0, i32* %scevgep25, align 4
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br label %bb7.backedge
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bb7.backedge: ; preds = %bb5, %bb4
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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br label %bb4
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return: ; preds = %entry
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ret void
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}
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