Mark Seaborn d2a816fe10 Cleanup: Remove use of old "-enable-correct-eh-support" option from a test ... This option enables LowerInvoke's obsolete SJLJ EH support, but the target used in this test (ARM Darwin) no longer uses the LowerInvoke pass, so the option has no effect here. This target currently uses the newer SjLjEHPrepare pass instead. This cleanup will help with removing "-enable-correct-eh-support". Differential Revision: http://llvm-reviews.chandlerc.com/D3064 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203810 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-13 16:23:00 +00:00
..
AArch64	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
ARM	Cleanup: Remove use of old "-enable-correct-eh-support" option from a test	2014-03-13 16:23:00 +00:00
CPP
Generic	CommandLine: Exit successfully for -version and -help	2014-02-28 19:08:01 +00:00
Hexagon
Inputs
Mips	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
MSP430
NVPTX	Followup to r203483 - add test.	2014-03-10 20:36:04 +00:00
PowerPC	[PowerPC] Initial support for the VSX instruction set	2014-03-13 07:58:58 +00:00
R600	R600: Fix trunc store from i64 to i1	2014-03-12 18:45:52 +00:00
SPARC	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
SystemZ	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
Thumb
Thumb2	ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block	2014-02-26 11:27:28 +00:00
X86	CodeGenPrep: sink extends of illegal types into use block.	2014-03-13 13:36:25 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00