David Majnemer d2f4460ee7 X86: Properly decode shuffle masks when the constant pool type is weird ...

It's possible for the constant pool entry for the shuffle mask to come
from a completely different operation.  This occurs when Constants have
the same bit pattern but have different types.

Make DecodePSHUFBMask tolerant of types which, after a bitcast, are
appropriately sized vector types.

This fixes PR22188.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225597 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-11 05:08:57 +00:00

..

AArch64

Fix PR22179.

2015-01-10 23:41:24 +00:00

ARM

Fix large stack alignment codegen for ARM and Thumb2 targets

2015-01-08 15:09:14 +00:00

CPP

…

Generic

CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.

2014-12-19 20:50:07 +00:00

Hexagon

[Hexagon] Adding dealloc_return encoding and absolute address stores.

2015-01-06 16:15:15 +00:00

Inputs

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Mips

[mips] Add support for accessing $gp as a named register.

2015-01-09 17:21:30 +00:00

MSP430

…

NVPTX

[NVPTX] Fix bugs related to isSingleValueType

2014-12-17 17:59:04 +00:00

PowerPC

[PowerPC] Mark zext of a small scalar load as free

2015-01-10 08:21:59 +00:00

R600

R600/SI: Remove SIISelLowering::legalizeOperands()

2015-01-08 15:08:17 +00:00

SPARC

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

SystemZ

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Thumb

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Thumb2

[ARM] Fix a bug in constant island pass that was triggering an assertion.

2015-01-08 20:44:50 +00:00

X86

X86: Properly decode shuffle masks when the constant pool type is weird

2015-01-11 05:08:57 +00:00

XCore

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00