llvm-6502/utils/TableGen
Johnny Chen d30a98e43a Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16 16:36:54 +00:00
..
AsmMatcherEmitter.cpp
AsmMatcherEmitter.h
AsmWriterEmitter.cpp
AsmWriterEmitter.h
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CallingConvEmitter.h
ClangDiagnosticsEmitter.cpp
ClangDiagnosticsEmitter.h
CMakeLists.txt
CodeEmitterGen.cpp
CodeEmitterGen.h
CodeGenDAGPatterns.cpp eliminate some #if 0 code I added in r96905, type inference 2010-03-15 06:03:22 +00:00
CodeGenDAGPatterns.h Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenRegisters.h
CodeGenTarget.cpp Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
CodeGenTarget.h Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
DAGISelEmitter.cpp Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
DAGISelEmitter.h optimize tblgen compile time by eliminating the old isel. 2010-03-01 21:49:54 +00:00
DAGISelMatcher.cpp add some helper functions and implement isContradictory 2010-03-07 06:29:26 +00:00
DAGISelMatcher.h add some helper functions and implement isContradictory 2010-03-07 06:29:26 +00:00
DAGISelMatcherEmitter.cpp so hey, it turns out that the histogram was completely wrong, because 2010-03-04 01:34:29 +00:00
DAGISelMatcherGen.cpp Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
DAGISelMatcherOpt.cpp don't form a RecordChild or CheckChildType for child #'s over 7, we don't 2010-03-16 00:35:11 +00:00
DisassemblerEmitter.cpp Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 2010-03-16 16:36:54 +00:00
DisassemblerEmitter.h
EDEmitter.cpp Check in tablegen changes to fix disassembler related failures caused by r98465. 2010-03-14 05:15:39 +00:00
EDEmitter.h
FastISelEmitter.cpp Completely rewrite tblgen's type inference mechanism, 2010-03-15 06:00:16 +00:00
FastISelEmitter.h
InstrEnumEmitter.cpp
InstrEnumEmitter.h
InstrInfoEmitter.cpp
InstrInfoEmitter.h
IntrinsicEmitter.cpp
IntrinsicEmitter.h
LLVMCConfigurationEmitter.cpp Make it not an error to specify -O* options several times. 2010-03-05 04:46:39 +00:00
LLVMCConfigurationEmitter.h
Makefile
OptParserEmitter.cpp
OptParserEmitter.h
Record.cpp
Record.h Fix PR2590 by making PatternSortingPredicate actually be 2010-03-01 22:09:11 +00:00
RegisterInfoEmitter.cpp
RegisterInfoEmitter.h
RISCDisassemblerEmitter.cpp Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 2010-03-16 16:36:54 +00:00
RISCDisassemblerEmitter.h Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 2010-03-16 16:36:54 +00:00
StringToOffsetTable.h
SubtargetEmitter.cpp
SubtargetEmitter.h
TableGen.cpp Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 2010-03-16 16:36:54 +00:00
TableGenBackend.cpp
TableGenBackend.h
TGLexer.cpp
TGLexer.h
TGParser.cpp
TGParser.h
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.h
X86RecognizableInstr.cpp Check in tablegen changes to fix disassembler related failures caused by r98465. 2010-03-14 05:15:39 +00:00
X86RecognizableInstr.h