llvm-6502/test/CodeGen
Jakob Stoklund Olesen d32eea9636 Remove some register allocation order dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 00:03:32 +00:00
..
ARM Remove some register allocation order dependencies. 2013-01-19 00:03:32 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Add indexed load/store instructions for offset validation check. 2013-01-17 18:42:37 +00:00
MBlaze
Mips [mips] MipsTargetLowering::getSetCCResultType should return a vector type if 2013-01-04 20:06:01 +00:00
MSP430
NVPTX
PowerPC Restore reverted test case, this time with REQUIRES: asserts 2013-01-17 19:46:51 +00:00
R600 DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 2013-01-02 22:13:01 +00:00
SI
SPARC
Thumb
Thumb2 Remove some register allocation order dependencies. 2013-01-19 00:03:32 +00:00
X86 On Sandybridge loading unaligned 256bits using two XMM loads (vmovups and vinsertf128) is faster than using a single vmovups instruction. 2013-01-18 23:10:30 +00:00
XCore