mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-31 09:11:13 +00:00
ef9c23f281
* ConstPoolPointerReference now represents a pointer to a GlobalValue * Methods name references are now explicit pointers to methods * Rename Value::GlobalVal to Value::GlobalVariableVal to avoid confusion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@703 91177308-0d34-0410-b5e6-96231b3b80d8
791 lines
23 KiB
C++
791 lines
23 KiB
C++
#include "llvm/Target/Sparc.h"
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#include "SparcInternals.h"
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#include "llvm/Method.h"
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#include "llvm/iTerminators.h"
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#include "llvm/iOther.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "llvm/CodeGen/PhyRegAlloc.h"
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//---------------------------------------------------------------------------
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// UltraSparcRegInfo
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// This method sets the hidden operand for return address in RETURN and
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// JMPL machine instructions.
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//---------------------------------------------------------------------------
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bool UltraSparcRegInfo::handleSpecialMInstr(const MachineInstr * MInst,
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LiveRangeInfo& LRI,
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vector<RegClass *>RCList) const {
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unsigned OpCode = MInst->getOpCode();
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// if the instruction is a RETURN instruction, suggest %i7
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if( (UltraSparcInfo->getInstrInfo()).isReturn( OpCode ) ) {
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const Value *RetAddrVal = getValue4ReturnAddr(MInst);
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if( (getRegClassIDOfValue( RetAddrVal) == IntRegClassID) ) {
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if( DEBUG_RA) {
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cout << "\n$?$Return Address Value is not of Integer Type. Type =";
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cout << (RetAddrVal->getType())->getPrimitiveID() << endl;
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}
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}
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LiveRange * RetAddrLR = new LiveRange();
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RetAddrLR->add(RetAddrVal);
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RetAddrLR->setRegClass( RCList[IntRegClassID] );
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LRI.addLRToMap( RetAddrVal, RetAddrLR);
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RetAddrLR->setSuggestedColor(SparcIntRegOrder::i7);
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return true;
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}
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// else if the instruction is a JMPL instruction, color it with %o7
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// this can be permenently colored since the LR is very short (one instr)
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// TODO: Directly change the machine register instead of creating a LR
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else if( (UltraSparcInfo->getInstrInfo()).isCall(MInst->getOpCode() ) ) {
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const Value *RetAddrVal = getValue4ReturnAddr(MInst);
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if( (getRegClassIDOfValue( RetAddrVal) == IntRegClassID) ) {
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if( DEBUG_RA) {
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cout << "\n$?$Return Address Value is not of Integer Type. Type =";
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cout << (RetAddrVal->getType())->getPrimitiveID() << endl;
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}
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}
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LiveRange * RetAddrLR = new LiveRange();
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RetAddrLR->add(RetAddrVal);
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RetAddrLR->setRegClass( RCList[IntRegClassID] );
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LRI.addLRToMap( RetAddrVal, RetAddrLR);
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RetAddrLR->setColor(SparcIntRegOrder::o7);
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return true;
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}
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else return false; // not a special machine instruction
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}
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//---------------------------------------------------------------------------
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// This gets the hidden value in a return register which is used to
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// pass the return address.
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//---------------------------------------------------------------------------
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Value *
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UltraSparcRegInfo::getValue4ReturnAddr( const MachineInstr * MInst ) const {
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if( (UltraSparcInfo->getInstrInfo()).isReturn(MInst->getOpCode()) ) {
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assert( (MInst->getNumOperands() == 2) && "RETURN must have 2 operands");
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const MachineOperand & MO = MInst->getOperand(0);
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return MO.getVRegValue();
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}
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else if( (UltraSparcInfo->getInstrInfo()).isCall(MInst->getOpCode()) ) {
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assert( (MInst->getNumOperands() == 3) && "JMPL must have 3 operands");
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const MachineOperand & MO = MInst->getOperand(2);
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return MO.getVRegValue();
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}
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else
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assert(0 && "Machine Instr is not a CALL/RET");
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}
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//---------------------------------------------------------------------------
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// This method will suggest colors to incoming args to a method.
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// If the arg is passed on stack due to the lack of regs, NOTHING will be
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// done - it will be colored (or spilled) as a normal value.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
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LiveRangeInfo& LRI) const
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{
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// get the argument list
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const Method::ArgumentListType& ArgList = Meth->getArgumentList();
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// get an iterator to arg list
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Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
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// for each argument
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for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
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// get the LR of arg
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
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assert( LR && "No live range found for method arg");
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unsigned RegType = getRegType( LR );
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// if the arg is in int class - allocate a reg for an int arg
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if( RegType == IntRegType ) {
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if( argNo < NumOfIntArgRegs) {
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LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
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}
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else {
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// Do NOTHING as this will be colored as a normal value.
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if (DEBUG_RA) cout << " Int Regr not suggested for method arg\n";
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}
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}
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else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
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else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
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}
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}
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//---------------------------------------------------------------------------
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//
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
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LiveRangeInfo& LRI,
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AddedInstrns *const FirstAI) const {
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// get the argument list
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const Method::ArgumentListType& ArgList = Meth->getArgumentList();
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// get an iterator to arg list
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Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
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MachineInstr *AdMI;
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// for each argument
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for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
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// get the LR of arg
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
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assert( LR && "No live range found for method arg");
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// if the LR received the suggested color, NOTHING to be done
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if( LR->hasSuggestedColor() && LR->hasColor() )
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if( LR->getSuggestedColor() == LR->getColor() )
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continue;
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// We are here because the LR did not have a suggested
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// color or did not receive the suggested color. Now handle
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// individual cases.
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unsigned RegType = getRegType( LR );
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unsigned RegClassID = (LR->getRegClass())->getID();
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// find whether this argument is coming in a register (if not, on stack)
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bool isArgInReg = false;
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unsigned UniArgReg = InvalidRegNum;
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if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0 + argNo );
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}
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else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum( RegClassID,
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SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
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}
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else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
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}
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if( LR->hasColor() ) {
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// We are here because the LR did not have a suggested
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// color or did not receive the suggested color but LR got a register.
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// Now we have to copy %ix reg (or stack pos of arg)
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// to the register it was colored with.
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unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
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// if the arg is coming in a register and goes into a register
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if( isArgInReg )
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AdMI = cpReg2RegMI(UniArgReg, UniLRReg, RegType );
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else
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assert(0 && "TODO: Color an Incoming arg on stack");
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// Now add the instruction
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FirstAI->InstrnsBefore.push_back( AdMI );
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}
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else { // LR is not colored (i.e., spilled)
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assert(0 && "TODO: Color a spilled arg ");
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}
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} // for each incoming argument
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}
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//---------------------------------------------------------------------------
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// This method is called before graph coloring to suggest colors to the
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// outgoing call args and the return value of the call.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestRegs4CallArgs(const CallInst *const CallI,
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LiveRangeInfo& LRI,
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vector<RegClass *> RCList) const {
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assert( (CallI->getOpcode() == Instruction::Call) && "Not a call instr");
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// First color the return value of the call instruction. The return value
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// will be in %o0 if the value is an integer type, or in %f0 if the
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// value is a float type.
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// the return value cannot have a LR in machine instruction since it is
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// only defined by the call instruction
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assert( (! LRI.getLiveRangeForValue( CallI ) ) &&
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"LR for ret Value of call already definded!");
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// if type is not void, create a new live range and set its
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// register class and add to LRI
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if( ! ((CallI->getType())->getPrimitiveID() == Type::VoidTyID) ) {
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// create a new LR for the return value
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LiveRange * RetValLR = new LiveRange();
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RetValLR->add( CallI );
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unsigned RegClassID = getRegClassIDOfValue( CallI );
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RetValLR->setRegClass( RCList[RegClassID] );
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LRI.addLRToMap( CallI, RetValLR);
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// now suggest a register depending on the register class of ret arg
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if( RegClassID == IntRegClassID )
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RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
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else if (RegClassID == FloatRegClassID )
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RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
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else assert( 0 && "Unknown reg class for return value of call\n");
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}
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// Now suggest colors for arguments (operands) of the call instruction.
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// Colors are suggested only if the arg number is smaller than the
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// the number of registers allocated for argument passing.
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Instruction::op_const_iterator OpIt = CallI->op_begin();
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++OpIt; // first operand is the called method - skip it
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// go thru all the operands of LLVM instruction
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for(unsigned argNo=0; OpIt != CallI->op_end(); ++OpIt, ++argNo ) {
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// get the LR of call operand (parameter)
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *OpIt);
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if( !LR ) { // possible because arg can be a const
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if( DEBUG_RA) {
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cout << " Warning: In call instr, no LR for arg: " ;
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printValue(*OpIt); cout << endl;
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}
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continue;
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}
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unsigned RegType = getRegType( LR );
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// if the arg is in int class - allocate a reg for an int arg
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if( RegType == IntRegType ) {
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if( argNo < NumOfIntArgRegs)
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LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
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else if (DEBUG_RA)
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// Do NOTHING as this will be colored as a normal value.
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cout << " Regr not suggested for int call arg" << endl;
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}
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else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
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else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
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} // for all call arguments
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}
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//---------------------------------------------------------------------------
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// After graph coloring, we have call this method to see whehter the return
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// value and the call args received the correct colors. If not, we have
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// to instert copy instructions.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::colorCallArgs(const CallInst *const CallI,
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LiveRangeInfo& LRI,
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AddedInstrns *const CallAI) const {
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// First color the return value of the call.
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// If there is a LR for the return value, it means this
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// method returns a value
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MachineInstr *AdMI;
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LiveRange * RetValLR = LRI.getLiveRangeForValue( CallI );
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if( RetValLR ) {
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bool recvSugColor = false;
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if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() )
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if( RetValLR->getSuggestedColor() == RetValLR->getColor())
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recvSugColor = true;
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// if we didn't receive the suggested color for some reason,
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// put copy instruction
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if( !recvSugColor ) {
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if( RetValLR->hasColor() ) {
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unsigned RegType = getRegType( RetValLR );
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unsigned RegClassID = (RetValLR->getRegClass())->getID();
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unsigned UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
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unsigned UniRetReg = InvalidRegNum;
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// find where we receive the return value depending on
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// register class
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if(RegClassID == IntRegClassID)
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UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0);
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else if(RegClassID == FloatRegClassID)
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UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
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AdMI = cpReg2RegMI(UniRetLRReg, UniRetReg, RegType );
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CallAI->InstrnsAfter.push_back( AdMI );
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} // if LR has color
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else {
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assert(0 && "LR of return value is splilled");
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}
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} // the LR didn't receive the suggested color
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} // if there is a LR - i.e., return value is not void
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// Now color all the operands of the call instruction
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Instruction::op_const_iterator OpIt = CallI->op_begin();
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++OpIt; // first operand is the called method - skip it
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// go thru all the operands of LLVM instruction
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for(unsigned argNo=0; OpIt != CallI->op_end(); ++OpIt, ++argNo ) {
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// get the LR of call operand (parameter)
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *OpIt);
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Value *ArgVal = (Value *) *OpIt;
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unsigned RegType = getRegType( ArgVal );
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unsigned RegClassID = getRegClassIDOfValue( ArgVal );
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// find whether this argument is coming in a register (if not, on stack)
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bool isArgInReg = false;
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unsigned UniArgReg = InvalidRegNum;
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if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
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}
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else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum(RegClassID,
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SparcFloatRegOrder::f0 + (argNo*2 + 1) );
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}
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else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
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}
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if( !LR ) { // possible because arg can be a const
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if( DEBUG_RA) {
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cout << " Warning: In call instr, no LR for arg: " ;
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printValue(*OpIt); cout << endl;
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}
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//AdMI = cpValue2RegMI( ArgVal, UniArgReg, RegType);
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//(CallAI->InstrnsBefore).push_back( AdMI );
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//cout << " *Constant moved to an output register\n";
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continue;
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}
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// if the LR received the suggested color, NOTHING to do
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if( LR->hasSuggestedColor() && LR->hasColor() )
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if( LR->getSuggestedColor() == LR->getColor() )
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continue;
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if( LR->hasColor() ) {
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// We are here because though the LR is allocated a register, it
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// was not allocated the suggested register. So, we have to copy %ix reg
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// (or stack pos of arg) to the register it was colored with
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unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
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if( isArgInReg )
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AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
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else
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assert(0 && "TODO: Push an outgoing arg on stack");
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// Now add the instruction
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CallAI->InstrnsBefore.push_back( AdMI );
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}
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else { // LR is not colored (i.e., spilled)
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assert(0 && "TODO: Copy a spilled call arg to an output reg ");
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}
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} // for each parameter in call instruction
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}
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//---------------------------------------------------------------------------
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// This method is called for an LLVM return instruction to identify which
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// values will be returned from this method and to suggest colors.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestReg4RetValue(const ReturnInst *const RetI,
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LiveRangeInfo& LRI) const {
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assert( (RetI->getOpcode() == Instruction::Ret) && "Not a ret instr");
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// get the return value of this return instruction
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const Value *RetVal = (RetI)->getReturnValue();
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// if the method returns a value
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if( RetVal ) {
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MachineInstr *AdMI;
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LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
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if ( LR ) {
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unsigned RegClassID = (LR->getRegClass())->getID();
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if( RegClassID == IntRegClassID )
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LR->setSuggestedColor(SparcIntRegOrder::i0);
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|
|
|
else if ( RegClassID == FloatRegClassID )
|
|
LR->setSuggestedColor(SparcFloatRegOrder::f0);
|
|
|
|
}
|
|
else {
|
|
if( DEBUG_RA )
|
|
cout << "Warning: No LR for return value" << endl;
|
|
// possible since this can be returning a constant
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//---------------------------------------------------------------------------
|
|
void UltraSparcRegInfo::colorRetValue(const ReturnInst *const RetI,
|
|
LiveRangeInfo& LRI,
|
|
AddedInstrns *const RetAI) const {
|
|
|
|
|
|
// get the return value of this return instruction
|
|
Value *RetVal = (Value *) (RetI)->getReturnValue();
|
|
|
|
// if the method returns a value
|
|
if( RetVal ) {
|
|
|
|
MachineInstr *AdMI;
|
|
LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
|
|
|
|
unsigned RegClassID = getRegClassIDOfValue(RetVal);
|
|
unsigned RegType = getRegType( RetVal );
|
|
unsigned UniRetReg = InvalidRegNum;
|
|
|
|
if(RegClassID == IntRegClassID)
|
|
UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 );
|
|
else if(RegClassID == FloatRegClassID)
|
|
UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
|
|
|
|
if ( LR ) {
|
|
|
|
// if the LR received the suggested color, NOTHING to do
|
|
|
|
if( LR->hasSuggestedColor() && LR->hasColor() )
|
|
if( LR->getSuggestedColor() == LR->getColor() )
|
|
return;
|
|
|
|
if( LR->hasColor() ) {
|
|
|
|
// We are here because the LR was allocted a regiter, but NOT
|
|
// the correct register.
|
|
|
|
// copy the LR of retun value to i0 or f0
|
|
|
|
unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
|
|
|
|
if(RegClassID == IntRegClassID)
|
|
UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0);
|
|
else if(RegClassID == FloatRegClassID)
|
|
UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
|
|
|
|
AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
|
|
|
|
}
|
|
else
|
|
assert(0 && "TODO: Copy the return value from stack\n");
|
|
|
|
} else {
|
|
|
|
// if NO LR we have to add an explicit copy to move the value to
|
|
// the return register.
|
|
|
|
//AdMI = cpValue2RegMI( RetVal, UniRetReg, RegType);
|
|
//(RetAI->InstrnsBefore).push_back( AdMI );
|
|
|
|
// assert( 0 && "Returned constant must be moved to the ret reg\n");
|
|
}
|
|
|
|
|
|
} // if there is a return value
|
|
|
|
}
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Copy from a register to register. Register number must be the unified
|
|
// register number
|
|
//---------------------------------------------------------------------------
|
|
|
|
|
|
MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
|
|
const unsigned DestReg,
|
|
const int RegType) const {
|
|
|
|
assert( (SrcReg != InvalidRegNum) && (DestReg != InvalidRegNum) &&
|
|
"Invalid Register");
|
|
|
|
MachineInstr * MI = NULL;
|
|
|
|
switch( RegType ) {
|
|
|
|
case IntRegType:
|
|
MI = new MachineInstr(ADD, 3);
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
|
|
MI->SetMachineOperand(2, DestReg, true);
|
|
break;
|
|
|
|
case FPSingleRegType:
|
|
MI = new MachineInstr(FMOVS, 2);
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
break;
|
|
|
|
case FPDoubleRegType:
|
|
MI = new MachineInstr(FMOVD, 2);
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
break;
|
|
|
|
default:
|
|
assert(0 && "Unknow RegType");
|
|
}
|
|
|
|
return MI;
|
|
}
|
|
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Only constant/label values are accepted.
|
|
// ***This code is temporary ***
|
|
//---------------------------------------------------------------------------
|
|
|
|
|
|
MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val,
|
|
const unsigned DestReg,
|
|
const int RegType) const {
|
|
|
|
assert( (DestReg != InvalidRegNum) && "Invalid Register");
|
|
|
|
/*
|
|
unsigned MReg;
|
|
int64_t Imm;
|
|
|
|
MachineOperand::MachineOperandType MOTypeInt =
|
|
ChooseRegOrImmed(Val, ADD, *UltraSparcInfo, true, MReg, Imm);
|
|
*/
|
|
|
|
MachineOperand::MachineOperandType MOType;
|
|
|
|
switch( Val->getValueType() ) {
|
|
|
|
case Value::ConstantVal:
|
|
case Value::GlobalVariableVal:
|
|
MOType = MachineOperand:: MO_UnextendedImmed; // TODO**** correct???
|
|
break;
|
|
|
|
case Value::BasicBlockVal:
|
|
case Value::MethodVal:
|
|
MOType = MachineOperand::MO_PCRelativeDisp;
|
|
break;
|
|
|
|
default:
|
|
cout << "Value Type: " << Val->getValueType() << endl;
|
|
assert(0 && "Unknown val type - Only constants/globals/labels are valid");
|
|
}
|
|
|
|
|
|
|
|
MachineInstr * MI = NULL;
|
|
|
|
switch( RegType ) {
|
|
|
|
case IntRegType:
|
|
MI = new MachineInstr(ADD);
|
|
MI->SetMachineOperand(0, MOType, Val, false);
|
|
MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
|
|
MI->SetMachineOperand(2, DestReg, true);
|
|
break;
|
|
|
|
case FPSingleRegType:
|
|
assert(0 && "FP const move not yet implemented");
|
|
MI = new MachineInstr(FMOVS);
|
|
MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
break;
|
|
|
|
case FPDoubleRegType:
|
|
assert(0 && "FP const move not yet implemented");
|
|
MI = new MachineInstr(FMOVD);
|
|
MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
break;
|
|
|
|
default:
|
|
assert(0 && "Unknow RegType");
|
|
}
|
|
|
|
return MI;
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Print the register assigned to a LR
|
|
//---------------------------------------------------------------------------
|
|
|
|
void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
|
|
|
|
unsigned RegClassID = (LR->getRegClass())->getID();
|
|
|
|
cout << " *Node " << (LR->getUserIGNode())->getIndex();
|
|
|
|
if( ! LR->hasColor() ) {
|
|
cout << " - could not find a color" << endl;
|
|
return;
|
|
}
|
|
|
|
// if a color is found
|
|
|
|
cout << " colored with color "<< LR->getColor();
|
|
|
|
if( RegClassID == IntRegClassID ) {
|
|
|
|
cout<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
|
|
cout << "]" << endl;
|
|
}
|
|
else if ( RegClassID == FloatRegClassID) {
|
|
cout << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
|
|
if( LR->getTypeID() == Type::DoubleTyID )
|
|
cout << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
|
|
cout << "]" << endl;
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|