llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-13 12:57:47 +00:00

History

Nicolas Geoffray 51cc3c13ea Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function the stub will resolve. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49814 91177308-0d34-0410-b5e6-96231b3b80d8		2008-04-16 20:46:05 +00:00
..
Alpha.h
Alpha.td
AlphaAsmPrinter.cpp
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp	Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.	2008-03-17 06:56:52 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Fix "Control reaches the end of non-void function" warnings,	2008-03-30 18:22:13 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp	Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal	2008-04-12 04:36:06 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp	Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function	2008-04-16 20:46:05 +00:00
AlphaJITInfo.h	Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function	2008-04-16 20:46:05 +00:00
AlphaLLRP.cpp
AlphaRegisterInfo.cpp	Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.	2008-03-31 20:40:39 +00:00
AlphaRegisterInfo.h	Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.	2008-03-31 20:40:39 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html