llvm-6502/test/CodeGen
Anton Korobeynikov 22836d1b31 Proper lower 'small' results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:24 +00:00
..
Alpha
ARM fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 2009-07-15 04:12:33 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP
Generic remove tests for removed intrinsics. 2009-07-12 21:30:06 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC get the PPC stub temporary label from the mangler instead of 2009-07-15 02:56:53 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
SystemZ Proper lower 'small' results 2009-07-16 13:58:24 +00:00
Thumb Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 2009-07-11 07:08:13 +00:00
Thumb2 Fix detection of valid BFC immediates. 2009-07-14 00:57:56 +00:00
X86 Let callers decide the sub-register index on the def operand of rematerialized instructions. 2009-07-16 09:20:10 +00:00
XCore Combine an unaligned store of unaligned load into a memmove. 2009-07-16 12:50:48 +00:00