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https://github.com/c64scene-ar/llvm-6502.git
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Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.0 KiB
LLVM
70 lines
2.0 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK
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; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG-CHECK
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
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; EG-CHECK: @i8_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: BUFFER_LOAD_UBYTE
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define void @i8_arg(i32 addrspace(1)* nocapture %out, i8 %in) nounwind {
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entry:
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%0 = zext i8 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; EG-CHECK: @i8_zext_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]}}, SGPR0_SGPR1, 11
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define void @i8_zext_arg(i32 addrspace(1)* nocapture %out, i8 zeroext %in) nounwind {
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entry:
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%0 = zext i8 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; EG-CHECK: @i8_sext_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]}}, SGPR0_SGPR1, 11
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define void @i8_sext_arg(i32 addrspace(1)* nocapture %out, i8 signext %in) nounwind {
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entry:
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%0 = sext i8 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; EG-CHECK: @i16_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: BUFFER_LOAD_USHORT
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define void @i16_arg(i32 addrspace(1)* nocapture %out, i16 %in) nounwind {
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entry:
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%0 = zext i16 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; EG-CHECK: @i16_zext_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]}}, SGPR0_SGPR1, 11
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define void @i16_zext_arg(i32 addrspace(1)* nocapture %out, i16 zeroext %in) nounwind {
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entry:
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%0 = zext i16 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; EG-CHECK: @i16_sext_arg
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; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]}}, SGPR0_SGPR1, 11
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define void @i16_sext_arg(i32 addrspace(1)* nocapture %out, i16 signext %in) nounwind {
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entry:
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%0 = sext i16 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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