llvm-6502/lib/Target/ARM/Disassembler
Johnny Chen d6cc53cfe4 Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand
instructions should have Rd (Inst{11-8}) != 0b1111.

Ref: A6.3 32-bit Thumb instruction encoding
     A6.3.11 Data-processing (shifted register)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 17:16:40 +00:00
..
ARMDisassembler.cpp Fixed logic error. Should check Builder for validity before calling SetSession 2010-04-16 23:02:25 +00:00
ARMDisassembler.h Fixed a nasty layering violation in the edis source 2010-04-13 21:21:57 +00:00
ARMDisassemblerCore.cpp ARM disassembler did not react to recent changes to the NEON instruction table. 2010-04-19 16:20:34 +00:00
ARMDisassemblerCore.h Fixed another assert exposed by fuzzing. The utility function getRegisterEnum() 2010-04-14 21:03:13 +00:00
Makefile Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 2010-04-07 20:53:12 +00:00
ThumbDisassemblerCore.h Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand 2010-04-19 17:16:40 +00:00