mirror of
https://github.com/c64scene-ar/llvm-6502.git
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f99998a2b0
Previously mips16 was sharing the pattern addr which is used for mips32 and mips64. This had a number of problems: 1) Storing and loading byte and halfword quantities for mips16 has particular problems due to the primarily non mips16 nature of SP. When we must load/store byte/halfword stack objects in a function, we must create a mips16 alias register for SP. This functionality is tested in stchar.ll. 2) We need to have an FP register under certain conditions (such as dynamically sized alloca). We use mips16 register S0 for this purpose. In this case, we also use this register when accessing frame objects so this issue also affects the complex pattern addr16. This functionality is tested in alloca16.ll. The Mips16InstrInfo.td has been updated to use addr16 instead of addr. The complex pattern C++ function for addr has been copied to addr16 and updated to reflect the above issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166897 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
3.3 KiB
LLVM
91 lines
3.3 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16_h
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16_b
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@.str = private unnamed_addr constant [9 x i8] c"%hd %c \0A\00", align 1
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@sp = common global i16* null, align 4
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@cp = common global i8* null, align 4
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define void @p1(i16 signext %s, i8 signext %c) nounwind {
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entry:
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%conv = sext i16 %s to i32
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%conv1 = sext i8 %c to i32
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%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv, i32 %conv1) nounwind
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ret void
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}
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declare i32 @printf(i8* nocapture, ...) nounwind
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define void @p2() nounwind {
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entry:
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%0 = load i16** @sp, align 4
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%1 = load i16* %0, align 2
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%2 = load i8** @cp, align 4
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%3 = load i8* %2, align 1
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%conv.i = sext i16 %1 to i32
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%conv1.i = sext i8 %3 to i32
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%call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv.i, i32 %conv1.i) nounwind
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%4 = load i16** @sp, align 4
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store i16 32, i16* %4, align 2
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%5 = load i8** @cp, align 4
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store i8 97, i8* %5, align 1
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ret void
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}
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define void @test() nounwind {
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entry:
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%s = alloca i16, align 4
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%c = alloca i8, align 4
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store i16 16, i16* %s, align 4
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store i8 99, i8* %c, align 4
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store i16* %s, i16** @sp, align 4
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store i8* %c, i8** @cp, align 4
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%call.i.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 16, i32 99) nounwind
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%0 = load i16** @sp, align 4
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store i16 32, i16* %0, align 2
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%1 = load i8** @cp, align 4
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store i8 97, i8* %1, align 1
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%2 = load i16* %s, align 4
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%3 = load i8* %c, align 4
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%conv.i = sext i16 %2 to i32
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%conv1.i = sext i8 %3 to i32
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%call.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv.i, i32 %conv1.i) nounwind
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ret void
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; 16_b: test:
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; 16_h: test:
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; 16_b: sb ${{[0-9]+}}, [[offset1:[0-9]+]](${{[0-9]+}})
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; 16_b: lb ${{[0-9]+}}, [[offset1]](${{[0-9]+}})
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; 16_h: sh ${{[0-9]+}}, [[offset2:[0-9]+]](${{[0-9]+}})
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; 16_h: lh ${{[0-9]+}}, [[offset2]](${{[0-9]+}})
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}
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define i32 @main() nounwind {
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entry:
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%s.i = alloca i16, align 4
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%c.i = alloca i8, align 4
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%0 = bitcast i16* %s.i to i8*
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call void @llvm.lifetime.start(i64 -1, i8* %0) nounwind
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call void @llvm.lifetime.start(i64 -1, i8* %c.i) nounwind
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store i16 16, i16* %s.i, align 4
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store i8 99, i8* %c.i, align 4
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store i16* %s.i, i16** @sp, align 4
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store i8* %c.i, i8** @cp, align 4
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%call.i.i.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 16, i32 99) nounwind
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%1 = load i16** @sp, align 4
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store i16 32, i16* %1, align 2
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%2 = load i8** @cp, align 4
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store i8 97, i8* %2, align 1
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%3 = load i16* %s.i, align 4
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%4 = load i8* %c.i, align 4
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%conv.i.i = sext i16 %3 to i32
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%conv1.i.i = sext i8 %4 to i32
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%call.i.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv.i.i, i32 %conv1.i.i) nounwind
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call void @llvm.lifetime.end(i64 -1, i8* %0) nounwind
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call void @llvm.lifetime.end(i64 -1, i8* %c.i) nounwind
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ret i32 0
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}
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declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
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declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
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