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6660ed5f2f
The fast register allocator is not supposed to work in the optimizing pipeline. It doesn't make sense to compute live intervals, run full copy coalescing, and then run RAFast. Fast register allocation in the optimizing pipeline is better done by RABasic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158242 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
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; The first argument of subfc must not be the same as any other register.
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; CHECK: subfc [[REG:r.]],
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; CHECK-NOT: [[REG]]
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; CHECK: InlineAsm End
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; PR1357
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "powerpc-apple-darwin8.8.0"
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;long long test(int A, int B, int C) {
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; unsigned X, Y;
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; __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"
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; : "=r" (X), "=&r" (Y)
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; : "r" (A), "rI" (B), "r" (C));
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; return ((long long)Y << 32) | X;
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;}
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define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
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entry:
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%Y = alloca i32, align 4 ; <i32*> [#uses=2]
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%tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1]
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%tmp5 = load i32* %Y ; <i32> [#uses=1]
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%tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
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%tmp7 = shl i64 %tmp56, 32 ; <i64> [#uses=1]
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%tmp89 = zext i32 %tmp4 to i64 ; <i64> [#uses=1]
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%tmp10 = or i64 %tmp7, %tmp89 ; <i64> [#uses=1]
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ret i64 %tmp10
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}
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