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86aef0a4f0
to be extended to a full register. This is modeled in the IR by marking the return value (or argument) with a signext or zeroext attribute. However, while these attributes are respected for function arguments, they are currently ignored for function return values by the PowerPC back-end. This patch updates PPCCallingConv.td to ask for the promotion to i64, and fixes LowerReturn and LowerCallResult to implement it. The new test case verifies that both arguments and return values are properly extended when passing them; and also that the optimizers understand incoming argument and return values are in fact guaranteed by the ABI to be extended. The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll, since the test case used a "ret" instruction to create a use of an i32 value at the end of the function (to set up data flow as required for what the test is intended to test). Since there's now an implicit promotion to i64, that data flow no longer works as expected. To fix this, this patch now adds an extra "add" to ensure we have an appropriate use of the i32 value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167396 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
637 B
LLVM
19 lines
637 B
LLVM
; RUN: llc -march=ppc64 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s
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; Check that the peephole optimizer knows about sext and zext instructions.
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; CHECK: test1sext
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define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
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%C = add i64 %A, %B
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; CHECK: add [[SUM:r[0-9]+]], r3, r4
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%D = trunc i64 %C to i32
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%E = shl i64 %C, 32
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%F = ashr i64 %E, 32
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; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]]
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store volatile i64 %F, i64 *%P2
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; CHECK: std [[EXT]]
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store volatile i32 %D, i32* %P
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; Reuse low bits of extended register, don't extend live range of SUM.
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; CHECK: stw [[EXT]]
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%R = add i32 %D, %D
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ret i32 %R
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}
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