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https://github.com/c64scene-ar/llvm-6502.git
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421021157e
This patch implements the PPCDAGToDAGISel::PostprocessISelDAG virtual method to perform post-selection peephole optimizations on the DAG representation. One optimization is implemented here: folds to clean up complex addressing expressions for thread-local storage and medium code model. It will also be useful for large code model sequences when those are added later. I originally thought about doing this on the MI representation prior to register assignment, but it's difficult to do effective global dead code elimination at that point. DCE is trivial on the DAG representation. A typical example of a candidate code sequence in assembly: addis 3, 2, globalvar@toc@ha addi 3, 3, globalvar@toc@l lwz 5, 0(3) When the final instruction is a load or store with an immediate offset of zero, the offset from the add-immediate can replace the zero, provided the relocation information is carried along: addis 3, 2, globalvar@toc@ha lwz 5, globalvar@toc@l(3) Since the addi can in general have multiple uses, we need to only delete the instruction when the last use is removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175697 91177308-0d34-0410-b5e6-96231b3b80d8
78 lines
2.2 KiB
LLVM
78 lines
2.2 KiB
LLVM
; RUN: llc -O1 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \
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; RUN: elf-dump --dump-section-data | FileCheck %s
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; FIXME: When asm-parse is available, could make this an assembly test.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@test_fn_static.si = internal global i32 0, align 4
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define signext i32 @test_fn_static() nounwind {
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entry:
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%0 = load i32* @test_fn_static.si, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @test_fn_static.si, align 4
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ret i32 %0
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}
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; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
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; accessing function-scoped variable si.
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;
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; CHECK: Relocation 0
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]]
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; CHECK-NEXT: 'r_type', 0x00000032
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; CHECK: Relocation 1
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM2]]
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; CHECK-NEXT: 'r_type', 0x00000030
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; CHECK: Relocation 2
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM2]]
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; CHECK-NEXT: 'r_type', 0x00000030
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@gi = global i32 5, align 4
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define signext i32 @test_file_static() nounwind {
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entry:
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%0 = load i32* @gi, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @gi, align 4
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ret i32 %0
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}
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; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
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; accessing file-scope variable gi.
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;
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; CHECK: Relocation 3
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]]
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; CHECK-NEXT: 'r_type', 0x00000032
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; CHECK: Relocation 4
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM3]]
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; CHECK-NEXT: 'r_type', 0x00000030
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; CHECK: Relocation 5
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM3]]
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; CHECK-NEXT: 'r_type', 0x00000030
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define double @test_double_const() nounwind {
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entry:
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ret double 0x3F4FD4920B498CF0
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}
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; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
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; accessing a constant.
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;
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; CHECK: Relocation 6
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]]
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; CHECK-NEXT: 'r_type', 0x00000032
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; CHECK: Relocation 7
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; CHECK-NEXT: 'r_offset'
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; CHECK-NEXT: 'r_sym', 0x[[SYM4]]
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; CHECK-NEXT: 'r_type', 0x00000030
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