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https://github.com/c64scene-ar/llvm-6502.git
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9ce56af1eb
No longer breaks SPEC2000/2006 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237361 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.9 KiB
LLVM
63 lines
1.9 KiB
LLVM
; RUN: llc -march=arm64 -enable-no-nans-fp-math < %s | FileCheck %s
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; RUN: llc -march=arm64 < %s | FileCheck %s --check-prefix=CHECK-SAFE
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define double @test_direct(float %in) {
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; CHECK-LABEL: test_direct:
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; CHECK-SAFE-LABEL: test_direct:
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%cmp = fcmp olt float %in, 0.000000e+00
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%longer = fpext float %in to double
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%val = select i1 %cmp, double 0.000000e+00, double %longer
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ret double %val
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; CHECK: fmax
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; CHECK-SAFE: fmax
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}
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define double @test_cross(float %in) {
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; CHECK-LABEL: test_cross:
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; CHECK-SAFE-LABEL: test_cross:
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%cmp = fcmp ult float %in, 0.000000e+00
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%longer = fpext float %in to double
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%val = select i1 %cmp, double %longer, double 0.000000e+00
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ret double %val
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; CHECK: fmin
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; CHECK-SAFE: fmin
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}
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; Same as previous, but with ordered comparison;
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; can't be converted in safe-math mode.
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define double @test_cross_fail_nan(float %in) {
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; CHECK-LABEL: test_cross_fail_nan:
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; CHECK-SAFE-LABEL: test_cross_fail_nan:
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%cmp = fcmp olt float %in, 0.000000e+00
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%longer = fpext float %in to double
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%val = select i1 %cmp, double %longer, double 0.000000e+00
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ret double %val
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; CHECK: fmin
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; CHECK-SAFE: fcsel d0, d1, d0, mi
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}
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; This isn't a min or a max, but passes the first condition for swapping the
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; results. Make sure they're put back before we resort to the normal fcsel.
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define float @test_cross_fail(float %lhs, float %rhs) {
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; CHECK-LABEL: test_cross_fail:
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; CHECK-SAFE-LABEL: test_cross_fail:
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%tst = fcmp une float %lhs, %rhs
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%res = select i1 %tst, float %rhs, float %lhs
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ret float %res
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; The register allocator would have to decide to be deliberately obtuse before
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; other register were used.
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; CHECK: fcsel s0, s1, s0, ne
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; CHECK-SAFE: fcsel s0, s1, s0, ne
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}
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; Make sure the transformation isn't triggered for integers
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define i64 @test_integer(i64 %in) {
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%cmp = icmp slt i64 %in, 0
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%val = select i1 %cmp, i64 0, i64 %in
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ret i64 %val
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}
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