mirror of
https://github.com/c64scene-ar/llvm-6502.git
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676efa4d56
Phabricator: http://reviews.llvm.org/D9863 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237963 91177308-0d34-0410-b5e6-96231b3b80d8
112 lines
3.7 KiB
LLVM
112 lines
3.7 KiB
LLVM
; RUN: llc < %s -march=arm64 -enable-misched=false -aarch64-stp-suppress=false -verify-machineinstrs | FileCheck %s
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; The next set of tests makes sure we can combine the second instruction into
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; the first.
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; CHECK-LABEL: stp_int_aa
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; CHECK: stp w0, w1, [x2]
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; CHECK: ldr w0, [x2, #8]
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; CHECK: ret
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define i32 @stp_int_aa(i32 %a, i32 %b, i32* nocapture %p) nounwind {
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store i32 %a, i32* %p, align 4
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%ld.ptr = getelementptr inbounds i32, i32* %p, i64 2
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%tmp = load i32, i32* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
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store i32 %b, i32* %add.ptr, align 4
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ret i32 %tmp
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}
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; CHECK-LABEL: stp_long_aa
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; CHECK: stp x0, x1, [x2]
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; CHECK: ldr x0, [x2, #16]
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; CHECK: ret
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define i64 @stp_long_aa(i64 %a, i64 %b, i64* nocapture %p) nounwind {
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store i64 %a, i64* %p, align 8
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%ld.ptr = getelementptr inbounds i64, i64* %p, i64 2
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%tmp = load i64, i64* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds i64, i64* %p, i64 1
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store i64 %b, i64* %add.ptr, align 8
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ret i64 %tmp
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}
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; CHECK-LABEL: stp_float_aa
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; CHECK: stp s0, s1, [x0]
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; CHECK: ldr s0, [x0, #8]
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; CHECK: ret
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define float @stp_float_aa(float %a, float %b, float* nocapture %p) nounwind {
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store float %a, float* %p, align 4
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%ld.ptr = getelementptr inbounds float, float* %p, i64 2
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%tmp = load float, float* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds float, float* %p, i64 1
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store float %b, float* %add.ptr, align 4
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ret float %tmp
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}
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; CHECK-LABEL: stp_double_aa
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; CHECK: stp d0, d1, [x0]
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; CHECK: ldr d0, [x0, #16]
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; CHECK: ret
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define double @stp_double_aa(double %a, double %b, double* nocapture %p) nounwind {
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store double %a, double* %p, align 8
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%ld.ptr = getelementptr inbounds double, double* %p, i64 2
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%tmp = load double, double* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds double, double* %p, i64 1
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store double %b, double* %add.ptr, align 8
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ret double %tmp
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}
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; The next set of tests makes sure we can combine the first instruction into
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; the second.
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; CHECK-LABEL: stp_int_aa_after
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; CHECK: ldr w0, [x3, #4]
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; CHECK: stp w1, w2, [x3]
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; CHECK: ret
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define i32 @stp_int_aa_after(i32 %w0, i32 %a, i32 %b, i32* nocapture %p) nounwind {
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store i32 %a, i32* %p, align 4
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%ld.ptr = getelementptr inbounds i32, i32* %p, i64 1
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%tmp = load i32, i32* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
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store i32 %b, i32* %add.ptr, align 4
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ret i32 %tmp
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}
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; CHECK-LABEL: stp_long_aa_after
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; CHECK: ldr x0, [x3, #8]
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; CHECK: stp x1, x2, [x3]
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; CHECK: ret
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define i64 @stp_long_aa_after(i64 %x0, i64 %a, i64 %b, i64* nocapture %p) nounwind {
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store i64 %a, i64* %p, align 8
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%ld.ptr = getelementptr inbounds i64, i64* %p, i64 1
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%tmp = load i64, i64* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds i64, i64* %p, i64 1
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store i64 %b, i64* %add.ptr, align 8
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ret i64 %tmp
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}
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; CHECK-LABEL: stp_float_aa_after
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; CHECK: ldr s0, [x0, #4]
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; CHECK: stp s1, s2, [x0]
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; CHECK: ret
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define float @stp_float_aa_after(float %s0, float %a, float %b, float* nocapture %p) nounwind {
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store float %a, float* %p, align 4
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%ld.ptr = getelementptr inbounds float, float* %p, i64 1
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%tmp = load float, float* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds float, float* %p, i64 1
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store float %b, float* %add.ptr, align 4
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ret float %tmp
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}
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; CHECK-LABEL: stp_double_aa_after
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; CHECK: ldr d0, [x0, #8]
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; CHECK: stp d1, d2, [x0]
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; CHECK: ret
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define double @stp_double_aa_after(double %d0, double %a, double %b, double* nocapture %p) nounwind {
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store double %a, double* %p, align 8
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%ld.ptr = getelementptr inbounds double, double* %p, i64 1
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%tmp = load double, double* %ld.ptr, align 4
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%add.ptr = getelementptr inbounds double, double* %p, i64 1
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store double %b, double* %add.ptr, align 8
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ret double %tmp
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}
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