llvm-6502/lib/Target/ARM64/AsmParser
Tim Northover d744346566 ARM64: add correct vector registers during asm parsing
Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:16:19 +00:00
..
ARM64AsmParser.cpp ARM64: add correct vector registers during asm parsing 2014-05-15 11:16:19 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile