..
AsmParser
ARM64: add correct vector registers during asm parsing
2014-05-15 11:16:19 +00:00
Disassembler
[ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
2014-05-15 11:07:57 +00:00
InstPrinter
[ARM64] Add condition code operand type such that proper diagnostics can be emitted
2014-05-15 11:06:51 +00:00
MCTargetDesc
[ARM64-BE] Fix byte order of CIE and FDE frames for exception handling
2014-05-14 16:51:58 +00:00
TargetInfo
Utils
[ARM64] Conditionalize CPU specific system registers on subtarget features
2014-05-01 10:25:36 +00:00
ARM64.h
ARM64.td
Fix typo.
2014-05-05 21:50:57 +00:00
ARM64AddressTypePromotion.cpp
ARM64AdvSIMDScalarPass.cpp
[ARM64][fast-isel] Disable target specific optimizations at -O0. Functionally,
2014-05-07 16:41:55 +00:00
ARM64AsmPrinter.cpp
AArch64/ARM64: support indexed loads/stores on vector types.
2014-05-02 14:54:15 +00:00
ARM64BranchRelaxation.cpp
ARM64CallingConv.h
ARM64CallingConvention.td
[ARM64-BE] Implement the lane-twiddling logic at AAPCS boundaries for big endian.
2014-05-07 12:33:41 +00:00
ARM64CleanupLocalDynamicTLSPass.cpp
ARM64CollectLOH.cpp
ARM64ConditionalCompares.cpp
AArch64/ARM64: expunge CPSR from the sources
2014-04-30 13:14:14 +00:00
ARM64DeadRegisterDefinitionsPass.cpp
ARM64ExpandPseudoInsts.cpp
ARM64FastISel.cpp
[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.
2014-05-08 12:53:50 +00:00
ARM64FrameLowering.cpp
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
2014-05-15 01:33:17 +00:00
ARM64FrameLowering.h
ARM64InstrAtomics.td
ARM64InstrFormats.td
[ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
2014-05-15 11:07:57 +00:00
ARM64InstrInfo.cpp
ARM64: merge "extend" and "shift" addressing-mode enums.
2014-05-12 14:13:17 +00:00
ARM64InstrInfo.h
AArch64/ARM64: expunge CPSR from the sources
2014-04-30 13:14:14 +00:00
ARM64InstrInfo.td
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
2014-05-15 01:33:17 +00:00
ARM64ISelDAGToDAG.cpp
Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
2014-05-14 21:14:37 +00:00
ARM64ISelLowering.cpp
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
2014-05-15 01:33:17 +00:00
ARM64ISelLowering.h
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
2014-05-15 01:33:17 +00:00
ARM64LoadStoreOptimizer.cpp
[ARM64][fast-isel] Disable target specific optimizations at -O0. Functionally,
2014-05-07 16:41:55 +00:00
ARM64MachineFunctionInfo.h
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
2014-05-15 01:33:17 +00:00
ARM64MCInstLower.cpp
ARM64MCInstLower.h
ARM64PerfectShuffle.h
ARM64PromoteConstant.cpp
ARM64RegisterInfo.cpp
AArch64/ARM64: expunge CPSR from the sources
2014-04-30 13:14:14 +00:00
ARM64RegisterInfo.h
ARM64RegisterInfo.td
ARM64: add correct vector registers during asm parsing
2014-05-15 11:16:19 +00:00
ARM64SchedA53.td
ARM64SchedCyclone.td
ARM64Schedule.td
ARM64SelectionDAGInfo.cpp
ARM64SelectionDAGInfo.h
ARM64StorePairSuppress.cpp
ARM64Subtarget.cpp
[ARM64] Prefer generation of bzero on Darwin only
2014-05-01 13:11:59 +00:00
ARM64Subtarget.h
ARM64TargetMachine.cpp
[ARM64][fast-isel] Disable target specific optimizations at -O0. Functionally,
2014-05-07 16:41:55 +00:00
ARM64TargetMachine.h
ARM64TargetObjectFile.cpp
ARM64TargetObjectFile.h
ARM64TargetTransformInfo.cpp
CMakeLists.txt
LLVMBuild.txt
Fix broken build
2014-05-09 18:06:22 +00:00
Makefile
