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https://github.com/c64scene-ar/llvm-6502.git
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4fa2ddbb94
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164675 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.9 KiB
LLVM
41 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
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; rdar://5571034
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; This requires physreg joining, %vreg13 is live everywhere:
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; 304L %CL<def> = COPY %vreg13:sub_8bit; GR32_ABCD:%vreg13
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; 320L %vreg15<def> = COPY %vreg19; GR32:%vreg15 GR32_NOSP:%vreg19
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; 336L %vreg15<def> = SAR32rCL %vreg15, %EFLAGS<imp-def,dead>, %CL<imp-use,kill>; GR32:%vreg15
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define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp {
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; CHECK: foo:
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entry:
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%j.03 = add i32 %bbSize, -1 ; <i32> [#uses=2]
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%0 = icmp sgt i32 %j.03, -1 ; <i1> [#uses=1]
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br i1 %0, label %bb.nph, label %return
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bb.nph: ; preds = %entry
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%tmp9 = add i32 %bbStart, %bbSize ; <i32> [#uses=1]
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%tmp10 = add i32 %tmp9, -1 ; <i32> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %bb.nph
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; CHECK: %bb
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; CHECK-NOT: movb {{.*}}l, %cl
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; CHECK: sarl %cl
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%indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
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%j.06 = sub i32 %j.03, %indvar ; <i32> [#uses=1]
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%tmp11 = sub i32 %tmp10, %indvar ; <i32> [#uses=1]
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%scevgep = getelementptr i32* %ptr, i32 %tmp11 ; <i32*> [#uses=1]
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%1 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
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%2 = ashr i32 %j.06, %shifts ; <i32> [#uses=1]
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%3 = and i32 %2, 65535 ; <i32> [#uses=1]
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%4 = getelementptr inbounds i32* %quadrant, i32 %1 ; <i32*> [#uses=1]
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store i32 %3, i32* %4, align 4
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %bbSize ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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