NAKAMURA Takumi d8e67feaf2 llvm/test/CodeGen/X86/vselect.ll: Unbreak Windows x64 targets to add -mtriple=x86_64-unknown-unknown. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198114 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-28 13:04:29 +00:00
..
AArch64	[AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.	2013-12-25 07:12:34 +00:00
ARM	Unbreak ARM buildbots after r197653 by forcing the target triple on this test.	2013-12-19 18:14:42 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Fix pr18235.	2013-12-13 16:05:32 +00:00
Hexagon
Inputs
Mips	[Mips] Does not take in account 'use-soft-float' attribute's value when	2013-12-25 17:00:27 +00:00
MSP430
NVPTX
PowerPC	Implement initial-exec TLS for PPC32.	2013-12-20 18:08:54 +00:00
R600	R600: Allow ftrunc	2013-12-20 05:11:55 +00:00
SPARC	[Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.	2013-12-26 01:49:59 +00:00
SystemZ	[SystemZ] Use interlocked-access 1 instructions for CodeGen	2013-12-24 15:18:04 +00:00
Thumb	Correctly handle the degenerated triple "thumb".	2013-12-18 21:29:44 +00:00
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	llvm/test/CodeGen/X86/vselect.ll: Unbreak Windows x64 targets to add -mtriple=x86_64-unknown-unknown.	2013-12-28 13:04:29 +00:00
XCore