llvm-6502/test/MC
Jim Grosbach bd847644b3 AArch64: allow constant expressions for shifted reg literals
e.g., add w1, w2, w3, lsl #(2 - 1)

This sort of thing comes up in pre-processed assembly playing macro games.
Still validate that it's an assembly time constant. The early exit error check
was just a bit overzealous and disallowed a left paren.

rdar://18430542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 22:16:02 +00:00
..
AArch64 AArch64: allow constant expressions for shifted reg literals 2014-09-23 22:16:02 +00:00
ARM Downgrade DWARF2 section limit error to a warning 2014-09-22 10:45:16 +00:00
AsmParser MC: AsmLexer: handle multi-character CommentStrings correctly 2014-08-14 02:51:43 +00:00
COFF MC: ReadOnlyWithRel section kinds should map to rdata in COFF 2014-09-22 20:39:23 +00:00
Disassembler Thumb2 M-class MSR instruction support changes 2014-09-01 11:25:07 +00:00
ELF Fix typos in comments, NFC 2014-08-29 21:53:01 +00:00
MachO [dwarfdump] Dump full filenames as DW_AT_(decl|call)_file attribute values 2014-09-22 12:36:04 +00:00
Markup
Mips [mips] Add assembler support for the .set nodsp directive. 2014-09-17 09:01:54 +00:00
PowerPC [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
Sparc
SystemZ Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
X86 [x86] Fix a pretty horrible bug and inconsistency in the x86 asm 2014-09-06 10:00:01 +00:00