Nate Begeman da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This ...

will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8

2005-10-19 00:05:37 +00:00

..

Analysis

wrap a long line

2005-09-28 22:30:58 +00:00

Archive

speed up Archive::isBytecodeArchive in the case when the archive doesn't have

2005-09-23 06:22:58 +00:00

AsmParser

Implement PR614:

2005-08-27 18:50:39 +00:00

Bytecode

Use a map to cache the ModuleType information, so we can do logarithmic

2005-10-03 21:26:53 +00:00

CodeGen

Add the ability to lower return instructions to TargetLowering. This

2005-10-18 23:23:37 +00:00

Debugger

For PR495:

2005-07-07 23:21:43 +00:00

ExecutionEngine

Add help support for -mcpu and -mattr.

2005-09-02 19:27:43 +00:00

Linker

For PR495:

2005-07-07 23:21:43 +00:00

Support

Allow bugpoint+PPC codegen to use fsqrt

2005-08-29 13:14:24 +00:00

System

For PR616:

2005-08-24 10:07:20 +00:00

Target

Make a new reg class for 64 bit regs that aliases the 32 bit regs. This

2005-10-19 00:05:37 +00:00

Transforms

Add an option to this pass. If it is set, we are allowed to internalize

2005-10-18 06:29:22 +00:00

VMCore

Allow $

2005-10-14 01:28:34 +00:00

Makefile

Add the Linker library

2004-11-14 21:54:41 +00:00