llvm-6502/lib/Target/ARM/AsmParser
Jim Grosbach 63b46faeb8 Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 22:10:46 +00:00
..
ARMAsmLexer.cpp Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to 2011-06-30 01:53:36 +00:00
ARMAsmParser.cpp Thumb1 register to register MOV instruction is predicable. 2011-06-30 22:10:46 +00:00
CMakeLists.txt
Makefile