llvm-6502/test/MC
Jiangning Liu 959cd8f49b Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,
SADDL, UADDL, SADDW, UADDW, SSUBL, USUBL, SSUBW, USUBW, ADDHN, RADDHN, SABAL, UABAL, SUBHN, RSUBHN, SABDL, UABDL, SMLAL, UMLAL, SMLSL, UMLSL, SQDMLAL, SQDMLSL, SMULL, UMULL, SQDMULL, PMULL



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190288 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 02:20:27 +00:00
..
AArch64 Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions, 2013-09-09 02:20:27 +00:00
ARM [ARMv8] Add some missing tests for DSB/DMB. 2013-09-05 16:05:45 +00:00
AsmParser Improve handling of .file, .include and .incbin directives to 2013-09-05 19:14:26 +00:00
COFF Fix wrong code offset for unwind code SET_FPREG. 2013-08-27 04:16:16 +00:00
Disassembler Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions, 2013-09-09 02:20:27 +00:00
ELF [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
MachO Fixed a crash in the integrated assembler for Mach-O when a symbol difference 2013-09-05 20:25:06 +00:00
Markup
Mips [mips] Add definition of instruction "drotr32" (double rotate right plus 32). 2013-09-07 00:18:01 +00:00
PowerPC Given target assembler parsers a chance to handle variant expressions 2013-08-27 20:23:19 +00:00
SystemZ [SystemZ] Add NC, OC and XC 2013-09-05 10:36:45 +00:00
X86 [ms-inline asm] Support offsets after segment registers 2013-08-27 21:56:17 +00:00