Bruno Cardoso Lopes dbd4fe2b0a - Register v16i16 as valid VR256 register class ... - Add more bitcasts for v16i16 - Since 135661 and 135662 already added the splat logic, just add one more splat test for v16i16 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135663 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-21 02:24:08 +00:00
..
Alpha
ARM	Fix a crash when building 177.mesa for armv6.	2011-07-18 18:47:13 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CellSPU
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze
Mips	Lower memory barriers to sync instructions.	2011-07-19 23:30:50 +00:00
MSP430
PowerPC	Add MCObjectFileInfo and sink the MCSections initialization code from	2011-07-20 05:58:47 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2	Introduce MCCodeGenInfo, which keeps information that can affect codegen	2011-07-19 06:37:02 +00:00
X86	- Register v16i16 as valid VR256 register class	2011-07-21 02:24:08 +00:00
XCore	Add intrinsics for the zext / sext instructions.	2011-07-19 13:28:50 +00:00