David Blaikie 5401ba7099 Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> ... This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222334 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-19 07:49:26 +00:00
..
AsmParser	Remove StringMap::GetOrCreateValue in favor of StringMap::insert	2014-11-19 05:49:42 +00:00
Disassembler	Pass an ArrayRef to MCDisassembler::getInstruction.	2014-11-12 02:04:27 +00:00
InstPrinter
MCTargetDesc	Rename variables to conform to llvm coding standards.	2014-11-03 23:24:10 +00:00
TargetInfo
Utils
AArch64.h
AArch64.td
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	[FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic	2014-11-18 22:41:49 +00:00
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp	[AArch64] Don't optimize all compare instructions.	2014-11-18 21:02:40 +00:00
AArch64InstrInfo.h
AArch64InstrInfo.td	AArch64: Pattern match integer vector abs like we do on ARM.	2014-11-04 20:10:06 +00:00
AArch64ISelDAGToDAG.cpp
AArch64ISelLowering.cpp	[Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability	2014-11-19 00:29:14 +00:00
AArch64ISelLowering.h
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool>	2014-11-19 07:49:26 +00:00
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp	Remove redundant calls to isMaterializable.	2014-11-01 16:46:18 +00:00
AArch64Subtarget.h	[AArch64] Disable useAA for Cortex-A57.	2014-11-19 06:48:56 +00:00
AArch64TargetMachine.cpp	[AArch64] Enable SeparateConstOffsetFromGEP, EarlyCSE and LICM passes on AArch64 backend.	2014-11-19 06:39:53 +00:00
AArch64TargetMachine.h	This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively	2014-11-13 09:26:31 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
CMakeLists.txt
LLVMBuild.txt
Makefile