Peter Collingbourne dc1a030aec ARM: Align functions containing Thumb-2 jump tables to 4 bytes. ... Functions with jump tables need an alignment of 4 because they use the ADR instruction, which aligns the PC to 4 bytes before adding an offset. Differential Revision: http://reviews.llvm.org/D9424 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236327 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-01 18:05:59 +00:00
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AArch64	[AArch64] Fix bad register class constraint in fast-isel for TST instruction.	2015-04-30 22:27:20 +00:00
ARM	ARM: Align functions containing Thumb-2 jump tables to 4 bytes.	2015-05-01 18:05:59 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	[mips][msa] Rename main check prefix to 'ALL' in basic operations tests. NFC	2015-04-30 09:57:37 +00:00
MSP430
NVPTX
PowerPC
R600	R600/SI: Add VCC as an implict def of SI_KILL	2015-05-01 03:44:09 +00:00
SPARC
SystemZ
Thumb
Thumb2
WinEH
X86	[SelectionDAG] Unary vector constant folding integer legality fixes	2015-05-01 08:20:04 +00:00
XCore