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c077472250
The Cyclone CPU is similar to swift for most LLVM purposes, but does have two preferred instructions for zeroing a VFP register. This teaches LLVM about them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205309 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
2.1 KiB
LLVM
71 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=armv8 -mcpu=cyclone < %s | FileCheck %s --check-prefix=CHECK-CYCLONE
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; RUN: llc -mtriple=armv8 -mcpu=swift < %s | FileCheck %s --check-prefix=CHECK-SWIFT
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declare arm_aapcs_vfpcc void @take_vec64(<2 x i32>)
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define void @test_vec64() {
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; CHECK-CYCLONE-LABEL: test_vec64:
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; CHECK-SWIFT-LABEL: test_vec64:
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call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>)
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call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>)
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; CHECK-CYCLONE-NOT: vmov.f64 d0,
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; CHECK-CYCLONE: vmov.i32 d0, #0
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; CHECK-CYCLONE: bl
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; CHECK-CYCLONE: vmov.i32 d0, #0
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; CHECK-CYCLONE: bl
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; CHECK-SWIFT: vmov.f64 [[ZEROREG:d[0-9]+]],
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; CHECK-SWIFT: vmov.i32 [[ZEROREG]], #0
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; CHECK-SWIFT: vorr d0, [[ZEROREG]], [[ZEROREG]]
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; CHECK-SWIFT: bl
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; CHECK-SWIFT: vorr d0, [[ZEROREG]], [[ZEROREG]]
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; CHECK-SWIFT: bl
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ret void
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}
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declare arm_aapcs_vfpcc void @take_vec128(<8 x i16>)
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define void @test_vec128() {
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; CHECK-CYCLONE-LABEL: test_vec128:
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; CHECK-SWIFT-LABEL: test_vec128:
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call arm_aapcs_vfpcc void @take_vec128(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
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call arm_aapcs_vfpcc void @take_vec128(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
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; CHECK-CYCLONE-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
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; CHECK-CYCLONE: vmov.i32 q0, #0
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; CHECK-CYCLONE: bl
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; CHECK-CYCLONE: vmov.i32 q0, #0
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; CHECK-CYCLONE: bl
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; CHECK-SWIFT-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
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; CHECK-SWIFT: vmov.i32 [[ZEROREG:q[0-9]+]], #0
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; CHECK-SWIFT: vorr q0, [[ZEROREG]], [[ZEROREG]]
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; CHECK-SWIFT: bl
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; CHECK-SWIFT: vorr q0, [[ZEROREG]], [[ZEROREG]]
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; CHECK-SWIFT: bl
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ret void
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}
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declare void @take_i32(i32)
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define void @test_i32() {
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; CHECK-CYCLONE-LABEL: test_i32:
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; CHECK-SWIFT-LABEL: test_i32:
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call arm_aapcs_vfpcc void @take_i32(i32 0)
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call arm_aapcs_vfpcc void @take_i32(i32 0)
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; CHECK-CYCLONE-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
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; CHECK-CYCLONE: mov r0, #0
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; CHECK-CYCLONE: bl
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; CHECK-CYCLONE: mov r0, #0
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; CHECK-CYCLONE: bl
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; It doesn't particularly matter what Swift does here, there isn't carefully
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; crafted behaviour that we might break in Cyclone.
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ret void
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}
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