Akira Hatanaka 4147e4d054 Make the following changes in MipsAsmPrinter.cpp: ... - Remove code which lowers pseudo SETGP01. - Fix LowerSETGP01. The first two of the three instructions that are emitted to initialize the global pointer register now use register $2. - Stop emitting .cpload directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8		2012-05-12 00:48:43 +00:00
..
ARM	Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.	2012-05-11 09:10:54 +00:00
AsmParser
COFF
Disassembler	Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.	2012-05-11 09:28:27 +00:00
ELF
MachO	Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits	2012-05-03 22:41:56 +00:00
MBlaze
Mips	Make the following changes in MipsAsmPrinter.cpp:	2012-05-12 00:48:43 +00:00
X86