1
0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 04:30:12 +00:00
llvm-6502/test/CodeGen/PTX/add.ll
Justin Holewinski d8e4ed2686 PTX: MC-ize the PTX back-end (patch 1 of N)
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140697 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 14:32:04 +00:00

72 lines
1.6 KiB
LLVM

; RUN: llc < %s -march=ptx32 | FileCheck %s
define ptx_device i16 @t1_u16(i16 %x, i16 %y) {
; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, %rh{{[0-9]+}};
; CHECK: ret;
%z = add i16 %x, %y
ret i16 %z
}
define ptx_device i32 @t1_u32(i32 %x, i32 %y) {
; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}};
; CHECK: ret;
%z = add i32 %x, %y
ret i32 %z
}
define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}};
; CHECK: ret;
%z = add i64 %x, %y
ret i64 %z
}
define ptx_device float @t1_f32(float %x, float %y) {
; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
; CHECK: ret;
%z = fadd float %x, %y
ret float %z
}
define ptx_device double @t1_f64(double %x, double %y) {
; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
; CHECK: ret;
%z = fadd double %x, %y
ret double %z
}
define ptx_device i16 @t2_u16(i16 %x) {
; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, 1;
; CHECK: ret;
%z = add i16 %x, 1
ret i16 %z
}
define ptx_device i32 @t2_u32(i32 %x) {
; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 1;
; CHECK: ret;
%z = add i32 %x, 1
ret i32 %z
}
define ptx_device i64 @t2_u64(i64 %x) {
; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, 1;
; CHECK: ret;
%z = add i64 %x, 1
ret i64 %z
}
define ptx_device float @t2_f32(float %x) {
; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0D3FF0000000000000;
; CHECK: ret;
%z = fadd float %x, 1.0
ret float %z
}
define ptx_device double @t2_f64(double %x) {
; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0D3FF0000000000000;
; CHECK: ret;
%z = fadd double %x, 1.0
ret double %z
}