Akira Hatanaka de5a0b65c2 Modify MipsFrameLowering::emitPrologue and emitEpilogue. ... - Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit. - Change the types of variables so that they are sufficiently large to handle 64-bit pointers. - Emit instructions to set register $28 in a function prologue after instructions which store callee-saved registers have been emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148917 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-25 04:12:04 +00:00
..
ARM	Set correct <def,undef> flags when lowering REG_SEQUENCE.	2012-01-24 23:28:42 +00:00
CBackend
CellSPU	Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.	2012-01-17 21:44:01 +00:00
CPP
Generic	Manually upgrade the test suite to specify the flag to cttz and ctlz.	2011-12-12 11:59:10 +00:00
Hexagon	Hexagon: Fix a nasty order-of-initialization bug.	2011-12-16 19:08:59 +00:00
MBlaze
Mips	Modify MipsFrameLowering::emitPrologue and emitEpilogue.	2012-01-25 04:12:04 +00:00
MSP430
PowerPC	AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit	2012-01-16 22:53:41 +00:00
PTX	PTX: Continue to fix up the register mess.	2011-12-06 17:39:48 +00:00
SPARC	Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since	2011-12-03 21:24:48 +00:00
Thumb	Fix more places which should be checking for iOS, not darwin.	2012-01-04 01:55:04 +00:00
Thumb2	After r147827 and r147902, it's now possible for unallocatable registers to be	2012-01-14 01:53:46 +00:00
X86	ZERO_EXTEND operation is optimized for AVX.	2012-01-24 13:54:13 +00:00
XCore	FileCheck hygiene.	2012-01-05 00:43:34 +00:00