llvm-6502/test/CodeGen
Daniel Sanders de90aa00ac [mips] For N32/N64, structs must be passed in the upper bits of a register.
Summary:
Most structs were fixed by r218451 but those of between >32-bits and
<64-bits remained broken since they were not marked with [ASZ]ExtUpper.
This patch fixes the remaining cases by using
CCPromoteToUpperBitsInType<i64> on i64's in addition to i32 and smaller.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220556 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-24 13:09:19 +00:00
..
AArch64 [AArch64] Fix fast-isel of cbz of i1, i8, i16 2014-10-24 09:54:41 +00:00
ARM Do not emit intermediate register for zero FP immediate 2014-10-23 15:31:50 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] For N32/N64, structs must be passed in the upper bits of a register. 2014-10-24 13:09:19 +00:00
MSP430
NVPTX [MachineSink] Use the real post dominator tree 2014-10-15 03:27:43 +00:00
PowerPC [PATCH] Support select-cc for VSFRC when VSX is enabled 2014-10-22 16:58:20 +00:00
R600 R600/SI: Add another failing testcase for i1 copies 2014-10-22 05:30:42 +00:00
SPARC
SystemZ
Thumb [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex 2014-10-20 11:00:18 +00:00
Thumb2 ARM: Fix a bug which was causing convergence failure in constant-island pass. 2014-10-17 01:31:47 +00:00
X86 ScheduleDAG: record PhysReg dependencies represented by CopyFromReg nodes 2014-10-23 22:31:48 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00