llvm-6502/test/CodeGen
Bob Wilson de95c1b88b Add support for Neon VEXT (vector extract) shuffles.
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 17:03:43 +00:00
..
Alpha
ARM Add support for Neon VEXT (vector extract) shuffles. 2009-08-19 17:03:43 +00:00
Blackfin Add XFAIL testcase for setcc undef. 2009-08-15 12:10:22 +00:00
CBackend
CellSPU
CPP
Generic
Mips reintroduce support for Mips "small" section handling. This is 2009-08-13 06:28:06 +00:00
MSP430
PIC16 this passes. 2009-08-06 03:55:49 +00:00
PowerPC PowerPC inline asm was emitting two output operands 2009-08-18 00:18:39 +00:00
SPARC
SystemZ Various AsmWriter output cleanups. Use WriteAsOperand instead of 2009-08-13 01:36:44 +00:00
Thumb tPOP_RET now has predicate operands. 2009-08-13 06:05:07 +00:00
Thumb2 Make tail merging handle blocks with repeated predecessors correctly, and 2009-08-18 15:18:18 +00:00
X86 PR4737: Fix a nasty bug in load narrowing with non-power-of-two types. 2009-08-19 08:46:10 +00:00
XCore Add support for mergeable sections back into the XCore backend. 2009-08-18 21:14:31 +00:00