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dea9528f7f
the two operations together. This allows us to compile this: void %two(int %a, int* %b) { %tmp.2 = seteq int %a, 0 %tmp.0.0 = select bool %tmp.2, int 10, int 20 store int %tmp.0.0, int* %b ret void } into: two: save -96, %o6, %o6 or %g0, 20, %l0 or %g0, 10, %l1 subcc %i0, 0, %l2 be .LBBtwo_2 ! entry nop .LBBtwo_1: ! entry or %g0, %l0, %l1 .LBBtwo_2: ! entry st %l1, [%i1] restore %g0, %g0, %g0 retl nop instead of: two: save -96, %o6, %o6 sethi 0, %l0 or %g0, 1, %l1 or %g0, 20, %l2 or %g0, 10, %l3 subcc %i0, 0, %l4 be .LBBtwo_2 ! entry nop .LBBtwo_1: ! entry or %g0, %l0, %l1 .LBBtwo_2: ! entry subcc %l1, 0, %l0 bne .LBBtwo_4 ! entry nop .LBBtwo_3: ! entry or %g0, %l2, %l3 .LBBtwo_4: ! entry st %l3, [%i1] restore %g0, %g0, %g0 retl nop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25806 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
.cvsignore | ||
DelaySlotFiller.cpp | ||
FPMover.cpp | ||
Makefile | ||
README.txt | ||
SparcV8.h | ||
SparcV8.td | ||
SparcV8AsmPrinter.cpp | ||
SparcV8InstrFormats.td | ||
SparcV8InstrInfo.cpp | ||
SparcV8InstrInfo.h | ||
SparcV8InstrInfo.td | ||
SparcV8ISelDAGToDAG.cpp | ||
SparcV8RegisterInfo.cpp | ||
SparcV8RegisterInfo.h | ||
SparcV8RegisterInfo.td | ||
SparcV8Subtarget.cpp | ||
SparcV8Subtarget.h | ||
SparcV8TargetMachine.cpp | ||
SparcV8TargetMachine.h |
Meta TODO list: 1. Create a new DAG -> DAG instruction selector, by adding patterns to the instructions. 2. ??? 3. profit! To-do ----- * Keep the address of the constant pool in a register instead of forming its address all of the time. * We can fold small constant offsets into the %hi/%lo references to constant pool addresses as well.