llvm-6502/test/MC
Johnny Chen d8b4c4d74f A8.6.393
The ARM disassembler should reject invalid (type, align) encodings as invalid instructions.

So, instead of:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

	vst2.32	{d0, d2}, [r3, :256], r3

we now have:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

mc-input.txt:1:1: warning: invalid instruction encoding
0xb3 0x9 0x3 0xf4
^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-06 22:14:48 +00:00
..
ARM Constants with multiple encodings (ARM): 2011-04-05 18:02:46 +00:00
AsmParser Adding a test for "-inf" as well. 2011-03-29 21:54:10 +00:00
COFF Don't use PadSectionToAlignment on windows. 2010-12-06 03:03:44 +00:00
Disassembler A8.6.393 2011-04-06 22:14:48 +00:00
ELF Write the section table and the section data in the same order that 2011-03-20 18:44:20 +00:00
MachO MC: Add support for disabling "temporary label" behavior. Useful for debugging 2011-03-28 22:49:15 +00:00
MBlaze Teach the MBlaze asm parser how to parse special purpose register names. 2010-12-20 20:43:24 +00:00
X86 Add support for the VIA PadLock instructions. 2011-04-04 16:58:13 +00:00