llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-08 08:54:58 +00:00

History

Owen Anderson 940f83e772 Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8		2008-08-26 18:03:31 +00:00
..
Alpha.h	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
Alpha.td
AlphaAsmPrinter.cpp	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested	2008-08-26 18:03:31 +00:00
AlphaInstrInfo.h	Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested	2008-08-26 18:03:31 +00:00
AlphaInstrInfo.td	Tablegen generated code already tests the opcode value, so it's not	2008-08-20 15:24:22 +00:00
AlphaISelDAGToDAG.cpp	Move the point at which FastISel taps into the SelectionDAGISel	2008-08-23 02:25:05 +00:00
AlphaISelLowering.cpp	Rename SDOperand to SDValue.	2008-07-27 21:46:04 +00:00
AlphaISelLowering.h	Rename SDOperand to SDValue.	2008-07-27 21:46:04 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h	Trim #includes.	2008-08-05 15:32:23 +00:00
AlphaLLRP.cpp
AlphaRegisterInfo.cpp	Pool-allocation for MachineInstrs, MachineBasicBlocks, and	2008-07-07 23:14:23 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
AlphaTargetMachine.h	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html