mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 16:31:16 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
|
|
|
declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
|
|
declare double @llvm.sqrt.f64(double) nounwind readnone
|
|
|
|
; FUNC-LABEL: {{^}}rcp_f64:
|
|
; SI: v_rcp_f64_e32
|
|
define void @rcp_f64(double addrspace(1)* %out, double %src) nounwind {
|
|
%rcp = call double @llvm.AMDGPU.rcp.f64(double %src) nounwind readnone
|
|
store double %rcp, double addrspace(1)* %out, align 8
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}rcp_pat_f64:
|
|
; SI: v_rcp_f64_e32
|
|
define void @rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
|
|
%rcp = fdiv double 1.0, %src
|
|
store double %rcp, double addrspace(1)* %out, align 8
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}rsq_rcp_pat_f64:
|
|
; SI-UNSAFE: v_rsq_f64_e32
|
|
; SI-SAFE-NOT: v_rsq_f64_e32
|
|
define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
|
|
%sqrt = call double @llvm.sqrt.f64(double %src) nounwind readnone
|
|
%rcp = call double @llvm.AMDGPU.rcp.f64(double %sqrt) nounwind readnone
|
|
store double %rcp, double addrspace(1)* %out, align 8
|
|
ret void
|
|
}
|