Hao Liu dfe4fd9ceb [AArch64]Add patterns to match normal shift nodes: shl, sra and srl. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197969 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-24 09:00:21 +00:00
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AArch64	[AArch64]Add patterns to match normal shift nodes: shl, sra and srl.	2013-12-24 09:00:21 +00:00
ARM	Unbreak ARM buildbots after r197653 by forcing the target triple on this test.	2013-12-19 18:14:42 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Fix pr18235.	2013-12-13 16:05:32 +00:00
Hexagon
Inputs
Mips	Fix a problem with mips16 stubs when calls are transformed during	2013-12-18 23:57:48 +00:00
MSP430
NVPTX
PowerPC	Implement initial-exec TLS for PPC32.	2013-12-20 18:08:54 +00:00
R600	R600: Allow ftrunc	2013-12-20 05:11:55 +00:00
SPARC
SystemZ	[SystemZ] Optimize comparisons with truncated extended loads	2013-12-20 11:56:02 +00:00
Thumb	Correctly handle the degenerated triple "thumb".	2013-12-18 21:29:44 +00:00
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	AVX512: SETCC returns i1 for AVX-512 and i8 for all others	2013-12-22 10:13:18 +00:00
XCore