llvm-6502/test/CodeGen
Bruno Cardoso Lopes e2406dfd89 Reapply a more appropriate solution than in r137114. AVX supports
v4f64 = sitofp v4i32. This fix PR10559.
Also add support for v4i32 = fptosi v4f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 17:39:13 +00:00
..
Alpha
ARM print st_shndx with the correct number of bits. 2011-08-04 15:50:13 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze
Mips Lower memory barriers to sync instructions. 2011-07-19 23:30:50 +00:00
MSP430
PowerPC Add MCObjectFileInfo and sink the MCSections initialization code from 2011-07-20 05:58:47 +00:00
PTX PTX: Add initial support for device function calls 2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb
Thumb2 Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. 2011-08-08 19:49:37 +00:00
X86 Reapply a more appropriate solution than in r137114. AVX supports 2011-08-09 17:39:13 +00:00
XCore Fix crash with varargs function with no named parameters. 2011-08-01 16:45:59 +00:00